MCP1725_08 Datasheet, PDF (1/32 Pages) Microchip Technology – 500 mA, Low Voltage, Low Quiescent Current LDO Regulator

MCP1725
500 mA, Low Voltage, Low Quiescent Current LDO Regulator
Features
• 500 mA Output Current Capability
• Input Operating Voltage Range: 2.3V to 6.0V
• Adjustable Output Voltage Range: 0.8V to 5.0V
• Standard Fixed Output Voltages:
- 0.8V, 1.2V, 1.8V, 2.5V, 3.0V, 3.3V, 5.0V
• Other Fixed Output Voltage Options Available
Upon Request
• Low Dropout Voltage: 210 mV typical at 500 mA
• Typical Output Voltage Tolerance: 0.5%
• Stable with 1.0 µF Ceramic Output Capacitor
• Fast response to Load Transients
• Low Supply Current: 120 µA (typical)
• Low Shutdown Supply Current: 0.1 µA (typical)
• Adjustable Delay on Power Good Output
• Short Circuit Current Limiting and
Overtemperature Protection
• 2x3 DFN-8 and SOIC-8 Package Options
Applications
• High-Speed Driver Chipset Power
• Networking Backplane Cards
• Notebook Computers
• Network Interface Cards
• Palmtop Computers
• Video Graphics Adapters
• 2.5V to 1.XV Regulators
Description
The MCP1725 is a 500 mA Low Dropout (LDO) linear
regulator that provides high current and low output
voltages in a very small package. The MCP1725
comes in a fixed (or adjustable) output voltage version,
with an output voltage range of 0.8V to 5.0V. The
500 mA output current capability, combined with the
low output voltage capability, make the MCP1725 a
good choice for new sub-1.8V output voltage LDO
applications that have high current demands.
The MCP1725 is stable using ceramic output
capacitors that inherently provide lower output noise
and reduce the size and cost of the entire regulator
solution. Only 1 µF of output capacitance is needed to
stabilize the LDO.
Using CMOS construction, the quiescent current
consumed by the MCP1725 is typically less than
120 µA over the entire input voltage range, making it
attractive for portable computing applications that
demand high output current. When shut down, the
quiescent current is reduced to less than 0.1 µA.
The scaled-down output voltage is internally monitored
and a power good (PWRGD) output is provided when
the output is within 92% of regulation (typical). An
external capacitor can be used on the C_DELAY pin to
adjust the delay from 200 µs to 300 ms.
The overtemperature and short circuit current-limiting
provide additional protection for the LDO during system
fault conditions.
Package Types
Adjustable (SOIC-8)
Fixed (SOIC-8)
Adjustable (2x3 DFN)
Fixed (2x3 DFN)
V_{IN 1}
V_{IN 2}
SHDN 3
GND 4
8 V_OUT
7 ADJ
6 C_DELAY
5 PWRGD
V_{IN 1}
V_{IN 2}
SHDN 3
GND 4
8 V_OUT
V_{IN 1}
7 Sense
V_IN 2
6 C_{DELAY SHDN 3}
5 PWRGD
GND 4
8 ^VOUT
V_IN 1
7 ADJ
V_IN 2
6 ^CDELAY SHDN 3
5 PWRGD GND 4
8 V_OUT
7 Sense
6 C_DELAY
5 PWRGD
Note: DFN tab is at ground potential.
© 2007 Microchip Technology Inc.
DS22026B-page 1