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KSZ8081RNA Datasheet, PDF (1/52 Pages) Microchip Technology – 10BASE-T/100BASE-TX PHY with RMII Support | |||
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KSZ8081RNA/RND
10BASE-T/100BASE-TX PHY with RMII
Support
Features
⢠Single-Chip 10BASE-T/100BASE-TX IEEE 802.3
Compliant Ethernet Transceiver
⢠RMII v1.2 Interface Support with a 50 MHz Refer-
ence Clock Output to MAC, and an Option to
Input a 50 MHz Reference Clock
⢠RMII Back-to-Back Mode Support for a 100 Mbps
Copper Repeater
⢠MDC/MDIO Management Interface for PHY Reg-
ister Configuration
⢠Programmable Interrupt Output
⢠LED Outputs for Link and Activity Status Indica-
tion
⢠On-Chip Termination Resistors for the Differential
Pairs
⢠Baseline Wander Correction
⢠HP Auto MDI/MDI-X to Reliably Detect and Cor-
rect Straight-Through and Crossover Cable Con-
nections with Disable and Enable Option
⢠Auto-Negotiation to Automatically Select the
Highest Link-Up Speed (10/100 Mbps) and
Duplex (Half/Full)
⢠Power-Down and Power-Saving Modes
⢠LinkMD® TDR-Based Cable Diagnostics to Iden-
tify Faulty Copper Cabling
⢠Parametric NAND Tree Support for Fault Detec-
tion Between Chip I/Os and the Board
⢠HBM ESD Rating (6 kV)
⢠Loopback Modes for Diagnostics
⢠Single 3.3V Power Supply with VDD I/O Options
for 1.8V, 2.5V, or 3.3V
⢠Built-In 1.2V Regulator for Core
⢠Available in 24-pin 4 mm x 4 mm QFN Package
Target Applications
⢠Game Consoles
⢠IP Phones
⢠IP Set-Top Boxes
⢠IP TVs
⢠LOM
⢠Printers
ï£ 2016 Microchip Technology Inc.
DS00002199A-page 1
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