ENC28J60 Datasheet, PDF (1/4 Pages) Microchip Technology – Stand-Alone Ethernet Controller with SPI Product Brief

ENC28J60
Stand-Alone Ethernet Controller with SPI^™ Product Brief
Features
• IEEE 802.3 Compatible Ethernet Controller
• Integrated MAC and 10BASE-T PHY
• 8-Kbyte Transmit/Receive Packet Dual Port
Buffer SRAM
• Receiver and Collision Squelch Circuit
• Supports one 10BASE-T Port with Automatic
Polarity Detection and Correction
• Programmable Automatic Retransmit on Collision
• Programmable Padding and CRC Generation
• Programmable Automatic Rejection of Erroneous
Packets
• 10 Mbit/s SPI™ Interface
• Buffer:
- Configurable transmit/receive buffer size
- Hardware managed circular receive FIFO
- Byte-wide random and sequential access
- Internal DMA for fast memory copying
- Hardware assisted IP checksum calculation
Pin Diagrams
28-pin SSOP, SOIC and SPDIP
• MAC:
- Support for Unicast, Multicast and Broadcast
packets
- Programmable pattern matching
- Programmable wake-up on multiple packet
formats, including Magic Packet^®, Unicast,
Multicast, Broadcast, specific packet match
or any packet
- Loopback mode
• PHY:
- Wave shaping output filter
- Loopback mode
• Operational:
- Outputs for 2 LED indicators
- Transmit and receive interrupts
- 25 MHz clock
- Clock out pin with programmable prescaler
- Operating voltage range of 3.14V to 3.45V
- Temperature range: -40°C to +85°C Industrial,
0°C to +70°C Commercial (SSOP only)
• 28-pin SSOP, SOIC, SPDIP and QFN packages
28-pin QFN
VCAP
1
VSS
2
CLKO
3
INT
4
WOL
5
SO
6
SI
7
SCK
8
CS
9
RESET
10
VSSRX
11
TPIN-
12
TPIN+
13
RBIAS
14
28
VDD
27
LEDA
26
LEDB
25
VDDOSC
24
OSC2
23
OSC1
22
VSSOSC
21
VSSPLL
20
VDDPLL
19
VDDRX
18
VSSTX
17
TPOUT+
16
TPOUT-
15
VDDTX
WOL
SO
SI
SCK
CS
RESET
VSSRX
28 27 26 25 24 23 22
1
21
2
20
3
19
4 ^ENC28J60 18
5
17
6
16
7
15
8 9 10 11 12 13 14
VDDOSC
OSC2
OSC1
VSSOSC
VSSPLL
VDDPLL
VDDRX
 2004 Microchip Technology Inc.
Advance Information
DS39623E-page 1