85C72 Datasheet, PDF (1/8 Pages) Microchip Technology – 1K/2K/4K 5.0V CMOS Serial EEPROM

85C72/82/92
1K/2K/4K 5.0V CMOS Serial EEPROM
FEATURES
• Low power CMOS technology
• Two wire serial interface bus, I²C^™ compatible
• 5 volt only operation
• Self-timed write cycle (including auto-erase)
• Page-write buffer
• 1ms write cycle time for single byte
• 1,000,000 ERASE/WRITE cycles guaranteed
• Data retention >200 years
• 8-pin DIP or SOIC package
• Available for extended temperature ranges:
- Commercial: 0˚C to +70˚C
- Industrial: -40˚C to +85˚C
- Automotive: -40˚C to +125˚C
Organization
Page Write
Buffer
85C72
128 x 8
2 Bytes
85C82
256 x 8
2 Bytes
85C92
2 x 256 x 8
8 Bytes
DESCRIPTION
The Microchip Technology Inc. 85C72/82/92 is a 1K/
2K/4K bit Electrically Erasable PROM. The device is
organized as shown with a two wire serial interface.
Advanced CMOS technology allows a significant
reduction in power over NMOS serial devices. The
85C72/82/92 also has a page-write capability for up to
8 bytes of data (see chart). Up to eight 85C72/82/92s
may be connected to the two wire bus. The 85C72/82/
92 is available in standard 8-pin DIP and surface mount
SOIC packages.
I²C is a trademark of Philips Corporation
PACKAGE TYPE
DIP
A0 1
8 VCC
A1 2 ^85C72 7 NC
85C82
A2 3 ^85C92 6 SCL
VSS 4
5 SDA
8-lead
SOIC
A0
A1
A2
V SS
14-lead
SOIC _NC
A0
A1
NC
A2
VSS
NC
1
8
VCC
85C72
2 _85C82 7
NC
85C92
3
6
SCL
4
5
SDA
1
14
2
13
3
12
4 ^85C92 11
5
10
6
9
7
8
NC
VCC
NC
NC
SCL
SDA
NC
BLOCK DIAGRAM
VCC
VSS
SDA
DATA
BUFFER
(FIF0)
DATA REG.
SLAVE ADR.
SCL
CONTROL
LOGIC
A0 A1 A2
VPP
R/W AMP
AP
DO
DI
MEMORY
RN
ET
A0 to
ARRAY
S E ^A7
SR
INCREMENT
© 1995 Microchip Technology Inc.
DS11182C-page 1