28C16A_04 Datasheet, PDF (1/10 Pages) Microchip Technology – 16K (2K x 8) CMOS EEPROM

Obsolete Device
28C16A
16K (2K x 8) CMOS EEPROM
FEATURES
• Fast Read Access Time—150 ns
• CMOS Technology for Low Power Dissipation
- 30 mA Active
- 100 µA Standby
• Fast Byte Write Time—200 µs or 1 ms
• Data Retention >200 years
• High Endurance - Minimum 10⁴ Erase/Write Cycles
• Automatic Write Operation
- Internal Control Timer
- Auto-Clear Before Write Operation
- On-Chip Address and Data Latches
• Data polling
• Chip Clear Operation
• Enhanced Data Protection
- VCC Detector
- Pulse Filter
- Write Inhibit
• Electronic Signature for Device Identification
• 5-Volt-Only Operation
• Organized 2Kx8 JEDEC Standard Pinout
• 24-pin Dual-In-Line Package
• 32-pin PLCC Package
• Available for Extended Temperature Ranges:
- Commercial: 0°C to +70°C
- Industrial: -40°C to +85°C
DESCRIPTION
The Microchip Technology Inc. 28C16A is a CMOS 16K
non-volatile electrically Erasable PROM. The 28C16A
is accessed like a static RAM for the read or write
cycles without the need of external components. Dur-
ing a “byte write”, the address and data are latched
internally, freeing the microprocessor address and data
bus for other operations. Following the initiation of
write cycle, the device will go to a busy state and auto-
matically clear and write the latched data using an
internal control timer. To determine when a write cycle
is complete, the 28C16A uses Data polling. Data poll-
ing allows the user to read the location last written to
when the write operation is complete. CMOS design
and processing enables this part to be used in systems
where reduced power consumption and reliability are
required. A complete family of packages is offered to
provide the utmost flexibility in applications.
PACKAGE TYPES
A7 • 1
A6 2
A5 3
A4 4
A3 5
A2 6
A1 7
A0 8
I/O0 9
I/O1 10
I/O2 11
VSS 12
24 Vcc
23 A8
22 A9 ^{A6 5}
21 WE ^{A5 6}
20 OE
A4 7
A3 8
19 A10 _{A2 9}
18 CE _{A1 10}
17 I/O7 A0 11
16 I/O6 NC 12
15 I/O5 I/O0 13
14 I/O4
13 I/O3
29 A8
28 A9
27 NC
26 NC
25 OE
24 A10
23 CE
22 I/O7
21 I/O6
• Pin 1 indicator on PLCC on top of package
BLOCK DIAGRAM
I/O0
I/O7
VSS
VCC
CE
OE
WE
A0
A10
Data Protection
Circuitry
Chip Enable/
Output Enable
Control Logic
Auto Erase/Write
Timing
Program Voltage
Generation
Data
Poll
Y
L
Decoder
a
t
c
h
e
X
s
Decoder
Input/Output
Buffers
Y Gating
16K bit
Cell Matrix
 2004 Microchip Technology Inc.
DS11125J-page 1