25LC320 Datasheet, PDF (1/12 Pages) Microchip Technology – 32K 2.5V SPI Bus Serial EEPROM

25LC320
32K 2.5V SPI^™ Bus Serial EEPROM
FEATURES
• SPI modes 0,0 and 1,1
• 3.0 MHz Clock Rate
• Single supply with Programming Operation down
to 2.5V
• Low Power CMOS Technology
- Max Write Current: 5.0 mA
- Read Current: 1 mA at 5.5V, 3 Mhz
- Standby Current: 1 µA typical
• 4096 x 8 Organization
• 32-Byte Page
• Sequential Read
• Self-timed ERASE and WRITE Cycles
• Block Write Protection
- Protect none, 1/4, 1/2, or all of Array
• Built-in Write Protection
- Power On/Off Data Protection Circuitry
- Write Enable Latch
- Write Protect Pin
• High Reliability
- Endurance: 1M cycles (guaranteed)
- Data Retention: >200 years
- ESD protection: >4000V
• 8-pin PDIP/SOIC, 14-pin TSSOP
• Temperature ranges supported
- Commercial (C):
0°C to +70°C
- Industrial (I):
-40°C to +85°C
DESCRIPTION
The Microchip Technology Inc. 25LC320 is a 32K-bit
serial Electrically Erasable PROM (EEPROM). The
memory is accessed via a simple Serial Peripheral
Interface (SPI) compatible serial bus. The bus signals
required are a clock input (SCK) plus separate data in
(SI) and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing any
number of devices to share the same bus.
There are two other inputs that provide the end user
with additional flexibility. Communication to the device
can be paused via the hold pin (HOLD). While the
device is paused, transitions on its inputs will be
ignored, with exception of chip select, allowing the host
to service higher priority interrupts. Also write opera-
tions to the Status Register can be disabled via the
write protect pin (WP).
PACKAGE TYPES
DIP/SOIC
CS 1
SO 2
WP 3
VSS 4
TSSOP
CS 1
SO 2
NC 3
NC 4
NC 5
WP 6
VSS 7
BLOCK DIAGRAM
Status
Register
8 VCC
7 HOLD
6 SCK
5 SI
14 VCC
13 HOLD
12 NC
11 NC
10 NC
9 SCK
8 SI
HV Generator
I/O Control
Logic
Memory
X
Control
Logic
Dec
EEPROM
Array
Page Latches
WP
SI
SO
CS
SCK
HOLD
Vcc
Vss
Y Decoder
Sense Amp.
R/W Control
SPI is a trademark of Motorola.
© 1996 Microchip Technology Inc.
Preliminary
This document was created with FrameMaker 4 0 4
DS21158B-page 1