25AA512 Datasheet, PDF (1/32 Pages) Microchip Technology – 512 Kbit SPI Bus Serial EEPROM

25AA512/25LC512
512 Kbit SPI Bus Serial EEPROM
Device Selection Table
Part Number
25LC512
25AA512
VCC Range
2.5-5.5V
1.8-5.5V
Page Size
128 Byte
128 Byte
Temp. Ranges
I,E
I
Packages
P, SN, SM, MF
P, SN, SM, MF
Features:
• 20 MHz max. Clock Speed
• Byte and Page-level Write Operations
- 128-byte page
- 5 ms max.
- No page or sector erase required
• Low-Power CMOS Technology
- Max. Write Current: 5 mA at 5.5V, 20 MHz
- Read Current: 10 mA at 5.5V, 20 MHz
- Standby Current: 1μA at 2.5V (Deep power-
down)
• Electronic Signature for Device ID
• Self-Timed Erase and Write cycles
- Page Erase (5 ms, typical)
- Sector Erase (10 ms/sector, typical)
- Bulk Erase (10 ms, typical)
• Sector Write Protection (16K byte/sector)
- Protect none, 1/4, 1/2 or all of array
• Built-In Write Protection
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
• High Reliability
- Endurance: 1 Million erase/write cycles
• Temperature Ranges Supported;
- Industrial (I):
- Automotive (E):
-40°C to +85°C
-40°C to +125°C
• Pb-free and RoHS Compliant
Pin Function Table
Name
Function
CS
SO
WP
VSS
SI
SCK
HOLD
VCC
Chip Select Input
Serial Data Output
Write-Protect
Ground
Serial Data Input
Serial Clock Input
Hold Input
Supply Voltage
Description:
The Microchip Technology Inc. 25AA512/25LC512
(25XX512^*) is a 512 Kbit serial EEPROM memory with
byte-level and page-level serial EEPROM functions. It
also features Page, Sector and Chip erase functions
typically associated with Flash-based products. These
functions are not required for byte or page write opera-
tions. The memory is accessed via a simple Serial
Peripheral Interface (SPI) compatible serial bus. The
bus signals required are a clock input (SCK) plus sepa-
rate data in (SI) and data out (SO) lines. Access to the
device is controlled by a Chip Select (CS) input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
Chip Select, allowing the host to service higher priority
interrupts.
The 25XX512 is available in standard packages includ-
ing 8-lead PDIP, SOIC, and advanced 8-lead DFN
package. All packages are Pb-free and RoHS
compliant.
Package Types (not to scale)
CS 1
SO 2
WP 3
VSS 4
DFN
(MF)
8 VCC
7 HOLD
6 SCK
5 SI
PDIP/SOIC/SOIJ
(P, SN, SM)
CS 1
SO 2
WP 3
VSS 4
8 VCC
7 HOLD
6 SCK
5 SI
*25XX512 is used in this document as a generic part number
for the 25AA512, 25LC512 devices.
© 2007 Microchip Technology Inc.
Preliminary
DS22021B-page 1