25AA080_13 Datasheet, PDF (1/22 Pages) Microchip Technology – 8K SPI Bus Serial EEPROM

Not recommended for new designs –
Please use 25AA080A/B or 25LC080A/B.
25AA080/25LC080/25C080
8K SPI Bus Serial EEPROM
Device Selection Table
Part
Number
25AA080
25LC080
25C080
VCC
Range
1.8-5.5V
2.5-5.5V
4.5-5.5V
Max. Clock
Frequency
1 MHz
2 MHz
3 MHz
Temp.
Ranges
I
I
I,E
Features:
• Low-power CMOS technology:
- Write current: 3 mA maximum
- Read current: 500 A typical
- Standby current: 500 nA typical
• 1024 x 8-bit organization
• 16 byte page
• Write cycle time: 5 ms max.
• Self-timed erase and write cycles
• Block write protection:
- Protect none, 1/4, 1/2 or all of array
• Built-in write protection:
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
• Sequential read
• High reliability:
- Endurance: 1 M cycles
- Data retention: > 200 years
- ESD protection: > 4000V
• 8-pin PDIP and SOIC (150 mil)
• Temperature ranges supported:
- Industrial (I):
-40C to +85C
- Automotive (E) (25C080): -40°C to +125°C
Description:
The Microchip Technology Inc. 25AA080/25LC080/
25C080 (25XX080^*) are 8 Kbit Serial Electrically
Erasable PROMs. The memory is accessed via a
simple Serial Peripheral Interface (SPI) compatible
serial bus. The bus signals required are a clock input
(SCK) plus separate data in (SI) and data out (SO)
lines. Access to the device is controlled through a Chip
Select (CS) input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
chip select, allowing the host to service higher priority
interrupts.
Package Types
PDIP/SOIC
CS 1
SO 2
WP 3
VSS 4
8 VCC
7 HOLD
6 SCK
5 SI
Block Diagram
Status
Register
HV Generator
I/O Control
Logic
Memory X
Control
Logic Dec
EEPROM
Array
Page Latches
SI
SO
CS
SCK
HOLD
WP
VCC
VSS
Y Decoder
Sense Amp.
R/W Control
 1997-2012 Microchip Technology Inc.
DS21230E-page 1