24LCS22A Datasheet, PDF (1/24 Pages) Microchip Technology – 2K VESA® E-EDID™ Serial EEPROM

24LCS22A
2K VESA^® E-EDID^™ Serial EEPROM
Features
• Single supply with operation down to 2.5V
• Supports Enhanced EDID^™ (E-EDID^™) 1.3
• Completely implements DDC1/DDC2^™ interface
for monitor identification, including recovery to
DDC1
• 2K-bit Serial EEPROM Low-power CMOS
technology:
- 1 mA typical active current
- 10 µA standby current typical at 5.5V
• 2-wire serial interface bus, I²C^™ compatible
• 100 kHz (2.5V) and 400 kHz (5V) compatibility
• Self timed write cycle (including auto-erase)
• Hardware write-protect pin
• Page write buffer for up to eight bytes
• 1,000,000 erase write cycles
• Data retention > 200 years
• ESD protection > 4000V
• 8-pin DIP and SOIC packages
• Available temperature ranges:
- Industrial (I)
-40°C to +85°C
Description
The Microchip Technology Inc. 24LCS22A is a 256 x 8-bit
dual-mode Electrically Erasable PROM (EEPROM). This
device is designed for use in applications requiring
storage and serial transmission of configuration and
control information. Two modes of operation have been
implemented: Transmit-only mode (1K-bit) and
Bidirectional mode (2K-bit). Upon power-up, the device
will be in the Transmit-only mode, sending a serial bit
stream of the memory array from 00h to 7Fh, clocked by
the VCLK pin. A valid high-to-low transition on the SCL pin
will cause the device to enter the Transition mode, and
look for a valid control byte on the I²C bus. If it detects a
valid control byte from the master, it will switch into
Bidirectional mode, with byte selectable read/write
capability of the entire 2K memory array using SCL. If no
control byte is received, the device will revert to the
Transmit-only mode after it receives 128 consecutive
VCLK pulses while the SCL pin is idle. The 24LCS22A is
available in standard 8-pin DIP and SOIC packages. The
24LCS22A features a flexible Write-Protect pin which is
enabled by writing to address 7Fh (usually the checksum
in VESA^® applications.
Package Types
PDIP/SOIC
*NC 1
*NC 2
WP 3
VSS 4
8 VCC
7 VCLK
6 SCL
5 SDA
* Pins labeled ‘NC’ have no internal connection
Block Diagram
WP
I/O
Control
Logic
Memory
Control
Logic
XDEC
SDA SCL
VCLK
Vcc
Vss
HV Generator
EEPROM
Array
Page Latches
YDEC
Sense Amp.
R/W Control
 2003 Microchip Technology Inc.
DS21682B-page 1