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24LCS21A Datasheet, PDF (1/16 Pages) Microchip Technology – 1K 2.5V Dual Mode I 2 C Serial EEPROM | |||
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24LCS21A
1K 2.5V Dual Mode I2C⢠Serial EEPROM
FEATURES
⢠Single supply with operation down to 2.5V
⢠Completely implements DDC1â¢/DDC2â¢
interface for monitor identiï¬cation, including
recovery to DDC1
⢠Low power CMOS technology
- 1 mA typical active current
- 10 µA standby current typical at 5.5V
⢠2-wire serial interface bus, I2C⢠compatible
⢠100 kHz (2.5V) and 400 kHz (5V) compatibility
⢠Self-timed write cycle (including auto-erase)
⢠Hardware write-protect pin
⢠Page-write buffer for up to eight bytes
⢠10,000,000 erase/write cycles guaranteed
⢠Data retention > 200 years
⢠ESD Protection > 4000V
⢠8-pin PDIP and SOIC package
⢠Available for extended temperature ranges
- Commercial (C): 0°C to +70°C
- Industrial (I): -40°C to +70°C
DESCRIPTION
The Microchip Technology Inc. 24LCS21A is a 128 x 8-
bit dual-mode Electrically Erasable PROM. This device
is designed for use in applications requiring storage
and serial transmission of conï¬guration and control
information. Two modes of operation have been imple-
mented: Transmit-Only Mode and Bi-directional Mode.
Upon power-up, the device will be in the Transmit-Only
Mode, sending a serial bit stream of the memory array
from 00h to 7Fh, clocked by the VCLK pin. A valid high
to low transition on the SCL pin will cause the device to
enter the transition mode, and look for a valid control
byte on the I2C bus. If it detects a valid control byte from
the master, it will switch into Bi-directional Mode, with
byte selectable read/write capability of the memory
array using SCL. If no control byte is received, the
device will revert to the Transmit-Only Mode after it
receives 128 consecutive VCLK pulses while the SCL
pin is idle. The 24LCS21A also enables the user to
write-protect the entire memory array using its write-
protect pin. The 24LCS21A is available in a standard
8-pin PDIP and SOIC package in both commercial and
industrial temperature ranges.
PACKAGE TYPES
PDIP
NC 1
NC 2
WP 3
VSS 4
8 VCC
7 VCLK
6 SCL
5 SDA
SOIC
NC 1
NC 2
WP 3
VSS
4
8
VCC
7
VCLK
6
SCL
5
SDA
BLOCK DIAGRAM
WP
HV GENERATOR
I/O
CONTROL
LOGIC
MEMORY
CONTROL
LOGIC
XDEC
SDA SCL
VCLK
VCC
VSS
EEPROM
ARRAY
PAGE LATCHES
YDEC
SENSE AMP
R/W CONTROL
DDC is a trademark of the Video Electronics Standards Association.
I2C is a trademark of Philips Corporation.
© 1996 Microchip Technology Inc.
Preliminary
This document was created with FrameMaker 4 0 4
DS21161C-page 1
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