English
Language : 

24C32 Datasheet, PDF (1/12 Pages) Microchip Technology – 32K 5.0V I2C Smart Serial EEPROM
24C32
32K 5.0V I2C™ Smart Serial EEPROM
FEATURES
• Voltage operating range: 4.5V to 5.5V
- Peak write current 3 mA at 5.5V
- Maximum read current 150 µA at 5.5V
- Standby current 1 µA typical
• Industry standard two-wire bus protocol, I2C™
compatible
- Including 100 kHz and 400 kHz modes
• Self-timed write cycle (including auto-erase)
• Power on/off data protection circuitry
• Endurance:
- 10,000,000 Erase/Write cycles
guaranteed for High Endurance Block
- 1,000,000 E/W cycles guaranteed for
Standard Endurance Block
• 8 byte page, or byte modes available
• 1 page x 8 line input cache (64 bytes) for fast write
loads
• Schmitt trigger, filtered inputs for noise suppres-
sion
• Output slope control to eliminate ground bounce
• 2 ms typical write cycle time, byte or page
• Up to 8 chips may be connected to the same bus
for up to 256K bits total memory
• Electrostatic discharge protection > 4000V
• Data retention > 200 years
• 8-pin PDIP/SOIC packages
• Temperature ranges
- Commercial (C):
0˚C to +70˚C
- Industrial (I):
-40˚C to +85˚C
DESCRIPTION
The Microchip Technology Inc. 24C32 is a 4K x 8 (32K
bit) Serial Electrically Erasable PROM. This device has
been developed for advanced, low power applications
such as personal communications or data acquisition.
The 24C32 features an input cache for fast write loads
with a capacity of eight 8-byte pages, or 64 bytes. It
also features a fixed 4K-bit block of ultra-high endur-
ance memory for data that changes frequently. The
24C32 is capable of both random and sequential reads
up to the 32K boundary. Functional address lines allow
up to 8 - 24C32 devices on the same bus, for up to 256K
bits address space. Advanced CMOS technology
makes this device ideal for low-power non-volatile code
and data applications. The 24C32 is available in the
standard 8-pin plastic DIP and 8-pin surface mount
SOIC package
PACKAGE TYPES
PDIP
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 NC
6 SCL
5 SDA
SOIC
A0
1
A1
2
A2
3
VSS
4
8
VCC
7 NC
6 SCL
5 SDA
BLOCK DIAGRAM
A0..A2
HV GENERATOR
I/O
CONTROL
LOGIC
I/O
SCL
SDA
MEMORY
CONTROL
LOGIC
XDEC
EEPROM ARRAY
PAGE LATCHES
Cache
YDEC
VCC
VSS
SENSE AMP
R/W CONTROL
I2C is a trademark of Philips Corporation.
© 1996 Microchip Technology Inc.
This document was created with FrameMaker 4 0 4
DS21061F-page 1