24AA64_07 Datasheet, PDF (1/28 Pages) Microchip Technology – 64K I2C™ Serial EEPROM

24AA64/24LC64/24FC64
64K I²C^™ Serial EEPROM
Device Selection Table
Part
Number
VCC
Range
Max. Clock
Frequency
24AA64
1.7-5.5
400 kHz⁽¹⁾
24LC64
24FC64
2.5-5.5
1.7-5.5
400 kHz
1 MHz⁽²⁾
Note 1: 100 kHz for VCC <2.5V
2: 400 kHz for VCC <2.5V
Temp.
Ranges
I
I, E
I
Features:
• Single-supply with operation down to 1.7V for
24AA64/24FC64 devices, 2.5V for 24LC64
devices
• Low-power CMOS technology:
- Active current 1 mA, typical
- Standby current 1 μA, typical
• 2-wire serial interface, I²C™ compatible
• Schmitt Trigger inputs for noise suppression
• Output slope control to eliminate ground bounce
• 100 kHz and 400 kHz clock compatibility
• 1 MHz clock for FC versions
• Page write time 5 ms, typical
• Self-timed erase/write cycle
• 32-byte page write buffer
• Hardware write-protect
• ESD protection > 4,000V
• More than 1 million erase/write cycles
• Data retention > 200 years
• Factory programming available
• Packages include 8-lead PDIP, SOIC, TSSOP,
MSOP and DFN
• Pb-free and RoHS compliant
• Temperature ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
* 24XX64 is used in this document as a generic part
number for the 24AA64/24LC64/24FC64 devices.
Description:
The Microchip Technology Inc. 24AA64/24LC64/
24FC64 (24XX64*) is a 64 Kbit Electrically Erasable
PROM. The device is organized as a single block of 8K
x 8-bit memory with a 2-wire serial interface. Low-volt-
age design permits operation down to 1.7V, with
standby and active currents of only 1 μA and 1 mA,
respectively. It has been developed for advanced, low-
power applications such as personal communications
or data acquisition. The 24XX64 also has a page write
capability for up to 32 bytes of data. Functional address
lines allow up to eight devices on the same bus, for up
to 512 Kbits address space. The 24XX64 is available in
the standard 8-pin PDIP, surface mount SOIC, TSSOP,
DFN and MSOP packages.
Package Types
PDIP, MSOP
SOIC, TSSOP
A0 1
A1 2
A2 3
VSS 4
8 VCC _A0
1
7 WP _A1 2
6 SCL _A2 3
5 SDA VSS 4
8 _VCC
7 _WP
6 _SCL
5 _SDA
DFN
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 WP
6 SCL
5 SDA
Block Diagram
WP
HV
Generator
I/O
Control
Logic
I/O
SCL
SDA
VCC
VSS
Memory
Control
Logic
XDEC
EEPROM
Array
Page
Latches
YDEC
Sense Amp.
R/W Control
© 2007 Microchip Technology Inc.
DS21189L-page 1