ML6696 Datasheet, PDF (1/16 Pages) Micro Linear Corporation – 100BASE-X Fiber Physical Layer

December 1998
ML6696*
100BASE-X Fiber Physical Layer
GENERAL DESCRIPTION
FEATURES
The ML6696 implements the complete physical layer of
the Fast Ethernet 100BASE-X standard for fiber media. The
device provides the MII (Media Independent Interface) for
interface to upper-layer silicon. The ML6696 integrates the
data quantizer and the LED driver, allowing the use of
low cost optical PMD components.
The ML6696 includes 4B/5B encoder/decoder, 125MHz
clock recovery/clock generation, LED driver, and a data
quantizer. The device also offers a power down mode
which results in total power consumption of less than 20mA.
The ML6696 is suitable for the current 100BASE-FX IEEE
803.2u standard defined using 1300nm optics, as well as
for the proposed 100BASE-SX standard defined using lower
cost 820nm optics
BLOCK DIAGRAM
s 100BASE-FX physical layer with MII
s Optimal 100BASE-SX solution (draft standard)
s Integrated data quantizer (post-amplifier)
s Integrated LED driver
s 125MHz clock generation and recovery
s 4B/5B encoding/decoding
s Power-down mode
* Some Packages Are Obsolete
CLKREF
TXCLK
TXER
TXEN
TXD3
TXD2
TXD1
TXD0
MDC
MDIO
COL
CRS
RXCLK
RXER
RXDV
RXD3
RXD2
RXD1
RXD0
PCS
TRANSMIT
STATE
MACHINE
AND
4B/5B ENCODER
CARRIER & COLLISION
LOGIC
PCS
RECEIVE
STATE
MACHINE
AND
4B/5B DECODER
CLOCK
SYNTHESIZER
SERIALIZER
NRZ TO NRZI
ENCODER
MII SERIAL
MANAGEMENT
INTERFACE
INITIALIZATION
INTERFACE
DESERIALIZER
CLOCK & DATA
RECOVERY
NRZI TO NRZ
ENCODER
LED
DRIVER
IOUT
IOUT
RTSET
ECLK
EDIN
EDOUT
DATA QUANTIZER
(POST AMPLIFIER)
CAPB CAPDC
VIN+
VIN–
LINK100
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