English
Language : 

ML6692 Datasheet, PDF (1/21 Pages) Micro Linear Corporation – 100BASE-TX Physical Layer with MII
April 1999
ML6692
100BASE-TX Physical Layer with MII
GENERAL DESCRIPTION
The ML6692 implements the complete physical layer of
the Fast Ethernet 100BASE-TX standard. The ML6692
interfaces to the controller through the standard-compliant
Media Independent Interface (MII). The ML6692
functionality includes auto-negotiation, 4B/5B encoding/
decoding, Stream Cipher scrambling/descrambling,
125MHz clock recovery/generation, receive adaptive
equalization, baseline wander correction, and MLT-3/
10BASE-T transmitter.
For applications requiring 100Mbps only, such as
repeaters, the ML6692 offers a single-chip per-port
solution. For 10/100 dual speed adapters or switchers,
10BASE-T functionality may be attained using Micro
Linear’s ML2653, or by using an Ethernet controller that
contains an integrated 10BASE-T PHY.
FEATURES
s Single-chip 100BASE-TX physical layer
s Compliant to IEEE 802.3u 100BASE-TX standard
s Supports adapter, repeater and switch applications
s Single-jack 10BASE-T/100BASE-TX solution when used
with external 10Mbps PHY
s Compliant MII (Media Independant Interface)
s Auto-negotiation capability
s 4B/5B encoder/decoder
s Stream Cipher scrambler/descrambler
s 125MHz clock recovery/generation
s Baseline wander correction
s Adaptive equalization and MLT-3 encoding/decoding
s Supports full-duplex operation
BLOCK DIAGRAM (PLCC Package)
TXCLKIN
1
TXCLK
9
TXD3
3
TXD2
4
TXD1
5
TXD0
6
TXEN
7
TXER
8
CRS
18
COL
19
RXCLK
17
RXD3
10
RXD2
12
RXD1
14
RXD0
16
RXDV
21
RXER
23
MDC
24
MDIO
25
PCS TRANSMIT
STATE MACHINE
4B/5B ENCODER
SCRAMBLER
CARRIER AND
COLLISION LOGIC
PCS RECEIVE
STATE MACHINE
5B/4B DECODER
DESCRAMBLER
MII MANAGEMENT
REGISTERS
CLOCK SYNTHESIZER
49 48
NRZ TO NRZI ENCODER
SERIALIZER
MLT-3 ENCODER
CLOCK AND DATA
RECOVERY
NRZI TO NRZ DECODER
DESERIALIZER
AUTO-NEGOTIATION
AND CONTROL LOGIC
FLP/100BASE-TX/10BASE-T
TWISTED PAIR DRIVER
TPOUTP
40
TPOUTN
39
RTSET
37
EQUALIZER
BLW CORRECTION
MLT-3 DECODER
LOOPBACK MUX
INITIALIZATION
REGISTER
TPINP
45
TPINN
44
CMREF
46
RGMSET
36
LINK100
43
29 30 50 51 47
31 32 33 35
1