ML4827 Datasheet, PDF (1/16 Pages) Fairchild Semiconductor – Fault-Protected PFC and PWM Controller Combo

November 1998
PRELIMINARY
ML4827*
Fault-Protected PFC and PWM Controller Combo
GENERAL DESCRIPTION
The ML4827 is a controller for power factor corrected,
switched mode power supplies, that includes circuitry
necessary for conformance to the safety requirements of
UL1950. A direct descendent of the industry-standard
ML4824-1, the ML4827 adds a TriFault Detect™ function
to guarantee that no unsafe conditions may result from
single component failure in the PFC. Power Factor
Correction (PFC) allows the use of smaller, lower cost
bulk capacitors, reduces power line loading and stress on
the switching FETs, and results in a power supply that
fully complies with IEC1000-3-2 specification. The
ML4827 includes circuits for the implementation of a
leading edge, average current, “boost” type power factor
correction and a trailing edge, pulse width modulator
(PWM). The device is available in two versions; the
ML4827-1 (Duty Cycle_MAX = 50%) and the ML4827-2
(Duty Cycle_MAX = 74%). The higher maximum duty cycle
of the -2 allows enhanced utilization of a given
transformer core’s power handling capacity. An over-
voltage comparator shuts down the PFC section in the
event of a sudden decrease in load. The PFC section also
includes peak current limiting and input voltage brown-
out protection. The PWM section can be operated in
current or voltage mode, and includes a duty cycle limit
to prevent transformer saturation.
FEATURES
s Pin-compatible with industry-standard ML4824-1
s TriFault Detect™ to conform to UL1950™ requirements
s Available in 50% or 74% max duty cycle versions
s Low total harmonic distortion
s Reduces ripple current in the storage capacitor
between the PFC and PWM sections
s Average current, continuous boost leading edge PFC
s High efficiency trailing-edge PWM can be configured
for current mode or voltage mode operation
s Average line voltage compensation with brown-out
control
s PFC overvoltage comparator eliminates output
“runaway” due to load removal
s Current fed gain modulator for improved noise immunity
s Overvoltage protection, UVLO, and soft start
BLOCK DIAGRAM
* Some Packages Are End Of Life
VFB
15
2.5V
IAC
2
VRMS
4
ISENSE
3
16
VEAO
1
IEAO ^{POWER FACTOR CORRECTOR}
VEA
–
+
3.5kΩ ^IEA
+
–
GAIN
MODULATOR
3.5kΩ
0.5V
+
–
BROKEN WIRE
+ ^COMPARATOR
2.7V
–
–1V
OVP
+
–
+
–
PFC ILIMIT
2µA
VREF ^VCCZ
13.5V
13
VCC
7.5V
REFERENCE
VREF
14
SQ
RQ
SQ
PFC OUT
12
RAMP 1
7
OSCILLATOR
RQ
RAMP 2
8
8V
VDC
6
VCC
1.25V
SS
50µA
5
8V
DC ILIMIT
9
–
+
–
+
DUTY CYCLE
LIMIT
VIN OK
VFB –
1V –
2.5V +
+
DC ILIMIT
PULSE WIDTH MODULATOR
VCCZ
SQ
RQ
UVLO
PWM OUT
11
GND
10
1