ML4819 Datasheet, PDF (1/15 Pages) Fairchild Semiconductor – Power Factor and PWM Controller “Combo”

May 1997
ML4819*
Power Factor and PWM Controller “Combo”
GENERAL DESCRIPTION
FEATURES
The ML4819 is a complete boost mode Power factor
s Two 1A peak current totem-pole output drivers
Controller (PFC) which also contains a PWM controller.
The PFC circuit is similar to the ML4812 while the PWM
controller can be used for current or voltage mode control
s Precision buffered 5V reference (±1%)
s Large oscillator amplitude for better noise immunity
for a second stage converter. Since the PWM and PFC
s Precision duty cycle limit for PWM section
circuits share the same oscillator, synchronization of the
two stages is inherent. The outputs of the controller IC
provide high current (>1A peak) and high slew rate to
s Current input gain modulator improves noise immunity
s Programmable Ramp Compensation circuit
quickly charge and discharge MOSFET gates. Special care
s Over-Voltage comparator helps prevent output
has been taken in the design of the ML4819 to increase
“runaway”
system noise immunity.
s Wide common mode range in current sense
The PFC section is of the peak current sensing boost type,
compensators for better noise immunity
using a current sense transformer or current sensing
s Under-Voltage Lockout circuit with 6V hysteresis
MOSFETs to non-dissipatively sense switch current. This
Please ^{See Ml4824 for New Designs gives the system overall efficiency over average current}
sensing control method.
The PWM section includes cycle by cycle current limiting,
precise duty cycle limiting for single ended converters,
and slope compensation.
* Some Packages Are Obsolete
BLOCK DIAGRAM
10 ^RT
20 ^CT
OSC
PWM
CONTROLLER
DUTY CYCLE ₇
RAMP COMP
12
SLOPE
COMPENSATION
I_{LIM 11}
1V
I_SENSE B ₉
1 ^{ISENSE A}
POWER FACTOR
+ ^CONTROLLER
0.7V
5V
–
–
3 ^{GM OUT}
OVP
2
+
5V
–
R
SQ
PWM B
8
V_CC
OUT B
14
PGND B
13
4 ^{EA OUT A}
5 ^{INV A}
+
5V
–
ERROR
AMP
I_EA
ISINE
6
GND
19
GAIN MODULATOR
I_MULT
R
SQ
UNDER
VOLTAGE
LOCKOUT
V_{REF 18}
V_{CC 15}
V_CC
OUT A ₁₆
PGND A ₁₇
1