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MIC5311 Datasheet, PDF (9/11 Pages) Micrel Semiconductor – LowQ Mode Dual 300mA LDO
Micrel, Inc.
MIC5311
Functional Description
The MIC5311 is a high performance, low quiescent
current power management IC consisting of two µCap
low dropout regulators with a LowQ™ mode featuring
lower operating current. Both regulators are capable of
sourcing 300mA.
Enable 1 and 2
The enable inputs allow for logic control of both output
voltages with individual enable inputs. The enable input
is active high, requiring 1.0V for guaranteed operation.
The enable input is CMOS logic and cannot be left
floating.
LowQ™ Mode
The LowQ™ pin is logic level low, requiring <0.2V to
enter the LowQ™ mode. The LowQ™ pin cannot be left
floating. Features of the LowQ™ mode include lower
total quiescent current of typically 7uA.
Input Capacitor
Good bypassing is recommended from input to ground
to help improve AC performance. A 1µF capacitor or
greater located close to the IC is recommended. Larger
load currents may require larger capacitor values.
Bypass Capacitor
The internal reference voltage of the MIC5311 can be
bypassed with a capacitor to ground to reduce output
noise and increase input ripple rejection (PSRR). A
quick-start feature allows for quick turn-on of the output
voltage. The recommended nominal bypass capacitor is
0.01µF, but an increase will result in longer turn on
times ton.
Output Capacitor
Each regulator output requires a 2.2µF ceramic output
capacitor for stability. The output capacitor value can be
increased to improve transient response, but
performance has been optimized for a 2.2µF ceramic
type output capacitor. X7R/X5R dielectric-type ceramic
capacitors are recommended because of their
temperature performance. X7R-type capacitors change
capacitance by 15% over their operating temperature
range and are the most stable type of ceramic
capacitors. Z5U and Y5V dielectric capacitors change
value by as much as 50% to 60% respectively over their
operating temperature ranges. To use a ceramic chip
capacitor with Y5V dielectric, the value must be much
higher than a X7R ceramic capacitor to ensure the same
minimum capacitance over the equivalent operating
temperature range.
Thermal Considerations
The MIC5311 is designed to provide 300mA of
continuous current per channel in a very small MLF
package. Maximum power dissipation can be calculated
based on the output current and the voltage drop across
the part. To determine the maximum power dissipation
of the package, use the junction-to-ambient thermal
resistance of the device and the following basic
equation:
PD (max) = (TJ (max) - TA) /θJA
TJ (max) is the maximum junction temperature of the
die, 125°C, and TA is the ambient operating
temperature. θJA is layout dependent; Table 1 shows
examples of the junction-to-ambient thermal resistance
for the MIC5311.
Package
θJA Recommended
Minimum Footprint
3x3 MLF™-10
63°C/W
Table 1. MLF™ Thermal Resistance
θJC
2°C/W
The actual power dissipation of the regulator circuit can
be determined using the equation:
PDTOTAL = PD LDO1 + PD LDO2
PD LDO1 = (VIN-VOUT1) x IOUT1
PD LDO2 = (VIN-VOUT2) x IOUT2
Substituting PD(max) for PD and solving for the operating
conditions that are critical to the application will give the
maximum operating conditions for the regulator circuit.
For example, when operating the MIC5311 at 60°C with
a minimum footprint layout, the maximum load currents
can be calculated as follows:
PD (max) = (TJ (max) - TA) /θJA
PD (max) = (125°C - 60°C) / 63°C/W
PD (max) = 1.03W
The junction-to-ambient thermal resistance for the
minimum footprint is 63°C/W, from Table 1. The
maximum power dissipation must not be exceeded for
proper operation. Using a lithium-ion battery as the
supply voltage of 4.2V, 1.8VOUT/150mA for channel 1
and 2.8VOUT/100mA for channel 2, power dissipation
can be calculated as follows:
PD LDO1 = (VIN-VOUT1) x IOUT1
PD LDO1 = (4.2V-1.8V) x 150mA
PD LDO1 = 360mW
PD LDO2 = (VIN-VOUT2) x IOUT2
PD LDO1 = (4.2V-2.8V) x 100mA
PD LDO1 = 140mW
February 2005
9
M9999-021105
(408) 955-1690