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LMC7101_05 Datasheet, PDF (9/12 Pages) Micrel Semiconductor – Low-Power Operational Amplifier
LMC7101
Application Information
Input Common-Mode Voltage
Some amplifiers exhibit undesirable or unpredictable perfor-
mance when the inputs are driven beyond the common-mode
voltage range, for example, phase inversion of the output
signal. The LMC7101 tolerates input overdrive by at least
200mV beyond either rail without producing phase inversion.
If the absolute maximum input voltage (700mV beyond either
rail) is exceeded, the input current should be limited to ±5mA
maximum to prevent reducing reliability. A 10kΩ series input
resistor, used as a current limiter, will protect the input
structure from voltages as large as 50V above the supply or
below ground. See Figure 1.
RIN
VIN
10kΩ
VOUT
Figure 1. Input Current-Limit Protection
Output Voltage Swing
Sink and source output resistances of the LMC7101 are
equal. Maximum output voltage swing is determined by the
load and the approximate output resistance. The output
resistance is:
ROUT =
VDROP
ILOAD
VDROP is the voltage dropped within the amplifier output
stage. VDROP and ILOAD can be determined from the VO
(output swing) portion of the appropriate Electrical Character-
istics table. ILOAD is equal to the typical output high voltage
minus V+/2 and divided by RLOAD. For example, using the
Electrical Characteristics DC (5V) table, the typical output
high voltage using a 2kΩ load (connected to V+/2) is 4.989V,
which produces an ILOAD of
1.245mA

4.989V –
2k Ω
2.5V 
=
1.245mA .
Voltage drop in the amplifier output stage is:
VDROP = 5.0V – 4.989V
VDROP = 0.011V
Because of output stage symmetry, the corresponding typical
output low voltage (0.011V) also equals VDROP. Then:
Micrel, Inc.
ROUT =
0.011V
0.001245A
= 8.8 ≈ 9Ω
Driving Capacitive Loads
Driving a capacitive load introduces phase-lag into the output
signal, and this in turn reduces op-amp system phase margin.
The application that is least forgiving of reduced phase
margin is a unity gain amplifier. The LMC7101 can typically
drive a 100pF capacitive load connected directly to the output
when configured as a unity-gain amplifier.
Using Large-Value Feedback Resistors
A large-value feedback resistor (> 500kΩ) can reduce the
phase margin of a system. This occurs when the feedback
resistor acts in conjunction with input capacitance to create
phase lag in the fedback signal. Input capacitance is usually
a combination of input circuit components and other parasitic
capacitance, such as amplifier input capacitance and stray
printed circuit board capacitance.
Figure 2 illustrates a method of compensating phase lag
caused by using a large-value feedback resistor. Feedback
capacitor CFB introduces sufficient phase lead to overcome
the phase lag caused by feedback resistor RFB and input
capacitance CIN. The value of CFB is determined by first
estimating CIN and then applying the following formula:
RIN × CIN ≤ RFB × CFB
CFB
RFB
RIN
VIN
CIN
VOUT
Figure 2. Cancelling Feedback Phase Lag
Since a significant percentage of CIN may be caused by board
layout, it is important to note that the correct value of CFB may
change when changing from a breadboard to the final circuit
layout.
February 2005
9
LMC7101