PL602041 Datasheet, PDF (8/9 Pages) Micrel Semiconductor – ClockWorks PCIe Quad Outputs Ultra-Low Jitter, HCSL Frequency Synthesizer

Micrel, Inc.
Application Information
Crystal Layout
Keep the layers under the crystal as open as possible
and do not place switching signals or noisy supplies
under the crystal. Crystal load capacitance is built inside
the die, so no external capacitance is needed. See the
Selecting a Quartz Crystal for the Clockworks Flex I
Family of Precision Synthesizers application note for
more details.
Contact Micrel’s HBW applications group at:
[e-mail] if you need help selecting a
suitable crystal for your application.
Power Supply and Decoupling
Place the smallest value decoupling capacitor (4.7nF
above) between the VDD and VSS pins, as close as
possible to those pins and at the same side of the PCB
as the IC. The shorter the physical path from VDD to
capacitor and back from capacitor to VSS, the more
effective the decoupling. Use one 4.7nF capacitor for
each VDD pin on the PL602041.
PL602041
The impedance value of the Ferrite Bead (FB) needs to
be between 240Ω and 600Ω with a saturation current
≥150mA.
VDDO1 and VDDO2 pins connect directly to the VDD
plane. All VDD pins on the PL602041 connect to VDD
after the power supply filter.
HCSL Outputs
HCSL outputs are to be terminated with 50Ω to VSS. For
best performance load all outputs. If you want to AC-
couple or change the termination, contact Micrel’s
application group: [e-mail] (see Figure 5).
Power Supply Filtering Recommendations
Preferred filter, using Micrel MIC94300 or MIC94310 Ripple Blocker™:
Alternative, traditional filter, using a ferrite bead:
December 11, 2013
8
Revision 1.2
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