MIC5162 Datasheet, PDF (8/11 Pages) Micrel Semiconductor – Dual Regulator Controller For High-Speed Bus Termination

MIC5162
VDDQ
VREF
120pF
GND
Figure 3.
V_REF can also be manipulated for different applications. A
separate voltage source can be used to externally set the
reference point, bypassing the divider network. Also, external
resistors can be added from V_REF to ground or V_REF to V_DDQ
to shift the reference point up or down.
V_CC
V_CC supplies the internal circuitry of the MIC5162 and pro-
vides the drive voltage to enhance the external N-Channel
MOSFETs. A small 1µF capacitor is recommended for by-
passing the V_CC pin. The minimum V_CC voltage should be a
gate-source voltage above V_TT without exceeding 6V. For
example, on an SSTL compliant terminator, V_DDQ equals
2.5V and V_TT equals 1.25V. If the N-Channel MOSFET
selected requires a gate source voltage of 2.5V, V_CC should
be a minimum of 3.75V.
Feedback and Compensation
The feedback provides the path for the error amplifier to
regulate V_TT. An external resistor must be placed between
the feedback and V_TT. This allows the error amplifier to be
correctly externally compensated.
For most applications, a 3kΩ resistor is recommended.
The COMP pin on the MIC5162 is the output of the internal
error amplifier. By placing a capacitor between the COMP pin
and the feedback pin, this coupled with the feedback resistor
places an external pole on the error amplifier. With a 3kΩ
feedback resistor, a minimum 220pF capacitor is recom-
mended for a 3A peak termination circuit. Increases in load,
multiple N-Channel MOSFETs and/or increase in output
capacitance may require feedback and/or compensation
capacitor values to be increased to maintain stability. Feed-
back resistor values should not exceed 100kΩ and compen-
sation capacitors should not be less than 40pF.
Enable
The MIC5162 features an active high enable input. In the off
mode state, leakage currents are reduced to microamperes.
The enable input has thresholds compatible with TTL/CMOS
for simple logic interfacing. The enable pin can be tied directly
to V_DDQ or V_CC for functionality. Do not float the enable pin.
Floating this pin causes the enable to be in an indeterminate
state.
Input Capacitance
Although the MIC5162 does not require an input capacitor for
stability, using one greatly improves device performance.
Due to the high-speed nature of the MIC5162, low ESR
capacitors such as Oscon and ceramics are recommended
for bypassing the input. The recommended value of capaci-
tance will depend greatly on the proximity to the bulk capaci-
Micrel, Inc.
tance. Although a 10µF ceramic capacitor will suffice for most
applications, input capacitance may need to be increased in
cases where the termination circuit is greater than 1" away
from the bulk capacitance.
Output Capacitance
Large, low ESR capacitors are recommended for the output
(V_TT) of the MIC5162. Although low ESR capacitors are not
required for stability, they are recommended to reduce the
effects of high-speed current transients on V_TT. The change
in voltage during the transient condition will be the effect of the
peak current multiplied by the output capacitor’s ESR. For
that reason, Oscon type capacitors are excellent for this
application. They have extremely low ESR and large capaci-
tance-to-size ratio. Ceramic capacitors are also well suited to
termination due to their low ESR. These capacitors should
have a dielectric rating of X5R or X7R. Y5V and Z5U type
capacitors are not recommended, due to their poor perfor-
mance at high frequencies and over temperature. The mini-
mum recommended capacitance for a 3 amp peak circuit is
100µF. Output capacitance can be increased to achieve
greater transient performance.
MOSFET Selection
The MIC5162 utilizes external N-Channel MOSFETs to sink
and source current. MOSFET selection will settle to two main
categories: size and gate threshold (V_GS).
MOSFET Power Requirements
One of the most important factors is to determine the amount
of power the MOSFET is going to be required to dissipate.
Power dissipation in an SSTL circuit will be identical for both
the high side and low side MOSFETs. Since the supply
voltage is divided by half to supply V_TT, both MOSFETs have
the same voltage dropped across them. They are also
required to be able to sink and source the same amount of
current (for either all 0’s or all 1’s). This equates to each side
being able to dissipate the same amount of power. Power
dissipation calculation for the high-side driver is as follows:
( ) ^P_D ^{= V}_DDQ ^{− V}_TT ^{× I _ SOURCE}
Where I_source is the average source current.
Power dissipation for the low-side MOSFET is as follows;
P_D = V_TT × I _ SINK
Where I_sink is the average sink current.
In a typical 3 amp peak SSTL_2 circuit, power considerations
for MOSFET selection would occur as follows.
( ) ^P_D ^{= V}_DDQ ^{− V}_TT ^{× I _ SOURCE}
P_D = (2.5V − 1.25V) × 1.6A
P_D = 2W
This typical SSTL_2 application would require both high-side
and low-side N-Channel MOSFETs to be able to handle 2
Watts each. In applications where there is excessive power
dissipation, multiple N-Channel MOSFETs may be placed in
parallel. These MOSFETs will share current, distributing
power dissipation across each device.
M9999-092004
8
February 2005