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KSZ8893MQL Datasheet, PDF (78/116 Pages) Micrel Semiconductor – Integrated 3-Port 10/100 Managed Switch with PHYs
Micrel, Inc.
KSZ8893MQL/MBL
Register 28 (0x1C): Port 1 Control 12
Register 44 (0x2C): Port 2 Control 12
Register 60 (0x3C): Reserved, not applied to port 3
Bit
Name
R/W Description
7
Auto
R/W = 0, disable auto negotiation; speed and duplex
Negotiation
are determined by bits 6 and 5 of this register.
Enable
= 1, auto negotiation is on
Default
For port 1, P1ANEN pin
value during reset.
For port 2, P2ANEN pin
value during reset
6
Force Speed R/W = 1, forced 100BT if AN is disabled (bit 7)
= 0, forced 10BT if AN is disabled (bit 7)
For port 1, P1SPD pin
value during reset.
For port 2, P2SPD pin
value during reset.
5
Force Duplex R/W = 1, forced full duplex if (1) AN is disabled or (2) For port 1, P1DPX pin
AN is enabled but failed.
value during reset.
= 0, forced half duplex if (1) AN is disabled or (2) For port 2, P2DPX pin
AN is enabled but failed.
value during reset.
4
Advertise Flow R/W = 1, advertise flow control (pause) capability
ADVFC pin value
Control
capability
= 0, suppress flow control (pause) capability from during reset.
transmission to link partner
3
Advertise
R/W = 1, advertise 100BT full duplex capability
1
100BT Full
Duplex
Capability
= 0, suppress 100BT full duplex capability from
transmission to link partner
2
Advertise
R/W = 1, advertise 100BT half duplex capability
1
100BT Half
Duplex
Capability
= 0, suppress 100BT half duplex capability from
transmission to link partner
1
Advertise
R/W = 1, advertise 10BT full duplex capability
1
10BT Full
Duplex
Capability
= 0, suppress 10BT full duplex capability from
transmission to link partner
0
Advertise
R/W = 1, advertise 10BT half duplex capability
1
10BT Half
Duplex
Capability
= 0, suppress 10BT half duplex capability from
transmission to link partner
February 2010
78
M9999-021110-1.6