SY88303BL Datasheet, PDF (7/11 Pages) Micrel Semiconductor – 3.3V, 3.2Gbps CML Limiting Post Amplifier with Wide Loss-of-Signal Detection Range

Micrel, Inc.
Functional Block Diagram
SY88303BL
Detailed Description
The SY88303BL low-power limiting post amplifiers
operate from a single +3.3V power supply, over
temperatures from –40^oC to +85^oC. Signals with data
rates up to 3.2Gbps and as small as 10mV_PP can be
amplified. Figure 1 shows the allowed input voltage
swing. The SY88303BL generates a LOS output
allowing feedback to /EN for output stability. LOS_LVL sets
the sensitivity of the input amplitude detection.
Input Amplifier Buffer
Figure 2 shows a simplified schematic of the input
stage. The high-sensitivity of the input amplifier allows
signals as small as 10mV_PP to be amplified. The input
amplifier also allows input signals as large as
1800mV_PP. Input signals below 12mVpp are linearly
amplified with a typical 42dB differential voltage gain.
Since it is a limiting amplifier, these devices output
typically 800mV_PP voltage-limited waveforms for input
signals greater than 12mV_PP. Applications requiring the
SY88303BL to operate with strong signals should have
the upstream TIA placed as close as possible to the
devices’ input pins. This ensures the best performance
of the device.
Output Buffer
The SY88303BL CML output buffers are designed to
drive 50Ω lines. The output buffer requires appropriate
termination for proper operation. An exterΩnal 50
resistor to V_CC for each output pin provides this. Figure 3
shows a simplified schematic of the output stage.
Loss-of-Signal
The SY88303BL generates a chatter-free LOS open-
collector TTL output, as shown in Figure 4. LOS is used
to determine that the input amplitude is large enough to
be considered a valid input. LOS asserts high if the input
amplitude falls below the threshold sets by LOS_LVL and
de-asserts low otherwise. LOS can be fed back to the
enable bar (/EN) input to maintain output stability under
a loss-of-signal condition. /EN de-asserts the true output
signal without removing the input signals.
Loss-of-Signal Level Set
Programmable LOS level-set pin (LOS_LVL) sets the
threshold of the input amplitude detection. Connecting
an external resistor between V_CC and LOS_LVL set the
voltage at LOS_LVL. This voltage ranges from V_CC to V_REF.
The external resistor creates a voltage divider between
V_CC and V_REF, as shown in Figure 5.
Hysteresis
The SY88303BL typically provides 3.5dB LOS electrical
hysteresis. By definition, a power ratio measured in dB
is 10log (power ratio). Power is calculated as V^2IN / R for
an electrical signal. Hence, the same ratio can be stated
as 20log (voltage ratio). While in linear mode, the
electrical voltage input changes linearly with the optical
power and therefore, the ratios change linearly. Thus,
the optical hysteresis in dB is half the electrical
hysteresis in dB given in the data sheet. Since the
SY88303BL is an electrical device, this data sheet refers
to hysteresis in electrical terms. With 3.5dB LOS
hysteresis, a voltage factor of 1.5 is required to assert or
de-assert LOS.
November 2007
7
M9999-110207-A
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