MIC38300 Datasheet, PDF (7/10 Pages) Micrel Semiconductor – 3A SuperLNR™ Low Noise High Efficiency Regulator

Micrel, Inc.
MIC38300
Application Information
Enable Input
The MIC38300 features a TTL/CMOS compatible
positive logic enable input for on/off control of the device.
High enables the regulator while low disables the
regulator. In shutdown the regulator consumes very little
current (only a few microamperes of leakage). For
simple applications the enable (EN) can be connected to
V_IN (IN).
Input Capacitor
VIN provides power to the MOSFETs for the switch
mode regulator section, along with the current limiting
sensing. Due to the high switching speeds, a 10µF
capacitor is recommended close to VIN and the power
ground (PGND) pin for bypassing.
Analog V_IN (AVIN) provides power to the analog supply
circuitry. AVIN and VIN must be tied together. Careful
layout should be considered to ensure high frequency
switching noise caused by VIN is reduced before
reaching AVIN. A 1µF capacitor as close to AVIN as
possible is recommended.
Output Capacitor
The MIC38300 requires an output capacitor for stable
operation. As a µCap LDO, the MIC38300 can operate
with ceramic output capacitors of 10µF or greater.
Values of greater than 10µF improve transient response
and noise reduction at high frequency. X7R/X5R
dielectric-type ceramic capacitors are recommended
because of their superior temperature performance.
X7R-type capacitors change capacitance by 15% over
their operating temperature range and are the most
stable type of ceramic capacitors. Larger output
capacitances can be achieved by placing tantalum or
aluminum electrolytics in parallel with the ceramic
capacitor. For example, a 100µF electrolytic in parallel
with a 10µF ceramic can provide the transient and high
frequency noise performance of a 100µF ceramic at a
significantly lower cost. Specific undershoot/overshoot
performance will depend on both the values and
ESR/ESL of the capacitors.
For less than 5mV noise performance at higher current
loads, 20µF capacitors are recommended at LDOIN and
LDOOUT.
Low Pass Filter Pin
The MIC38300 features a Low Pass Filter (LPF) pin for
adjusting the switcher frequency. By tuning the
frequency, the user can further improve output ripple
without losing efficiency.
Adjustable Regulator Design
OUT
*C_FF
0.1µF
R1
ADJ
1.0V
*Required only for large ^R2
values of R1 and R2
Adjustable Regulator with Resistors
The adjustable MIC38300 output voltage can be
programmed from 1V to 5.0V using a resistor divider
from output to the SNS pin. Resistors can be quite large,
up to 100kΩ because of the very high input impedance
and low bias current of the sense amplifier. For large
value resistors (>50KΩ) R1 should be bypassed by a
small capacitor (C_FF = 0.1µF bypass capacitor) to avoid
instability due to phase lag at the ADJ/SNS input.
The output resistor divider values are calculated by:
V_OUT
= 1V ⎜⎛ ^R1 + 1⎟⎞
⎝ ^R2 ⎠
Efficiency Considerations
Efficiency is defined as the amount of useful output
power, divided by the amount of power supplied.
Efficiency
_%
=
⎜⎜⎝⎛
V_OUT
V_IN
× I_OUT
× I_IN
⎟⎟⎠⎞ ^{× 100}
Maintaining high efficiency serves two purposes. It
reduces power dissipation in the power supply, reducing
the need for heat sinks and thermal design
considerations and it reduces consumption of current for
battery powered applications. Reduced current draw
from a battery increases the devices operating time and
is critical in hand held devices.
There are two types of losses in switching converters;
DC losses and switching losses. DC losses are simply
the power dissipation of I²R. Power is dissipated in the
high side switch during the on cycle. Power loss is equal
to the high side MOSFET R_DSON multiplied by the Switch
Current². During the off cycle, the low side N-channel
MOSFET conducts, also dissipating power. Device
operating current also reduces efficiency. The product of
the quiescent (operating) current and the supply voltage
is another DC loss.
Over 100mA, efficiency loss is dominated by MOSFET
R_DSON and inductor losses. Higher input supply voltages
will increase the Gate to Source threshold on the internal
MOSFETs, reducing the internal RD_DSON. This improves
efficiency by reducing DC losses in the device. All but
the inductor losses are inherent to the device. In which
July 2007
7
M9999-070607
[phone]