KSZ9031RNX Datasheet, PDF (68/75 Pages) Micrel Semiconductor – Gigabit Ethernet Transceiver with RGMII Support

Micrel, Inc.
Power-Up/Power-Down/Reset Timing
KSZ9031RNX
Figure 15. Power-Up/Power-Down/Reset Timing
Parameter
tVR
tSR
tCS
tCH
tRC
tPC
Description
Min
Supply voltages rise time (must be monotonic) 200
Stable supply voltages to de-assertion of reset
10
Strap-in pin configuration setup time
5
Strap-in pin configuration hold time
5
De-assertion of reset to strap-in pin output
6
Supply voltages cycle off-to-on time
150
Max Units
µs
ms
ns
ns
ns
ms
Table 22. Power-Up/Power-Down/Reset Timing Parameters
NOTE 1: The recommended power-up sequence is to have the transceiver (AVDDH) and digital I/O (DVDDH) voltages
power up before the 1.2V core (DVDDL, AVDDL, AVDDL_PLL) voltage. If the 1.2V core must power up first, the
maximum lead time for the 1.2V core voltage with respect to the transceiver and digital I/O voltages should be 200µs.
There is no power sequence requirement between transceiver (AVDDH) and digital I/O (DVDDH) power rails.
The power-up waveforms should be monotonic for all supply voltages to the KSZ9031RNX.
NOTE 2: After the de-assertion of reset, wait a minimum of 100µs before starting programming on the MIIM (MDC/MDIO)
interface.
NOTE 3: The recommended power-down sequence is to have the 1.2V core voltage power down before powering down
the transceiver and digital I/O voltages.
Before the next power-up cycle, all supply voltages to the KSZ9031RNX should reach 0V and there should be a minimum
wait time of 150ms from power-off to power-on.
October 2012
68
M9999-103112-1.0