SY88703V Datasheet, PDF (5/8 Pages) Micrel Semiconductor – 3.3V/5V 622Mbps PECL LOW-POWER LIMITING POST AMPLIFIER W/TTL LOS

Micrel, Inc.
SY88703V
DETAILED DESCRIPTION
The SY88703V low power limiting post amplifier operates
from a single +3.3V or +5V power supply, over temperatures
from –40°C to +85°C. Signals with data rates up to 622Mbps
and as small as 5mVp-p can be amplified. Figure 1 shows
the allowed input voltage swing. The SY88703V generates
an LOS output. LOS_LVL sets the sensitivity of the input
amplitude detection.
Input Amplifier/Buffer
Figure 2 shows a simplified schematic of the SY88703V's
input stage. The high-sensitivity of the input amplifier allows
signals as small as 5mVp-p to be detected and amplified.
The input amplifier allows input signals as large as
1800mVp-p. Input signals are linearly amplified with a
typically 38dB differential voltage gain. Since it is a limiting
amplifier, the SY88703V outputs typically 1500mVp-p
voltage-limited waveforms for input signals that are greater
than 18mVp-p. Applications requiring the SY88703V to
operate with high-gain should have the upstream TIA placed
as close as possible to the SY88703V’s input pins to ensure
the best performance of the device.
Output Buffer
The SY88703V’s PECL output buffer is designed to drive
50Ω lines. The output buffer requires appropriate termination
for proper operation. An external 50Ω resistor to V_CC–2V
for each output pin provides this. Figure 3 shows a simplified
schematic of the output stage and includes an appropriate
termination method.
Loss-of-Signal
The SY88703V generates a chatter-free TTL LOS. A
recommended 2kΩ pull-up resistor to V_CC is required for
proper operation, as shown in Figure 4. LOS is used to
determine that the input amplitude is too small to be
considered a valid input. LOS asserts high if the input
amplitude falls below the threshold set by LOS_LVL and
deasserts low otherwise. LOS can be fed back to the enable
(/EN) input to maintain output stability under a loss of signal
condition. /EN deasserts the true output signal without
removing the input signals. Typically 4.6dB LOS hysteresis
is provided to prevent chattering.
Loss-of-Signal Level Set
A programmable LOS level set pin (LOS_LVL) sets the
threshold of the input amplitude detection. Setting a voltage
on LOS_LVL between V_CC and V_REF sets this threshold. If
desired, a resistor divider between V_CC and V_REF, as shown
in Figure 5, also creates this threshold. The smaller the
voltage difference from LOS_LVL to V_CC, the smaller the
LOS sensitivity. Hence, larger input amplitude is required to
deassert LOS. “Typical Operating Characteristics” shows
the relationship between the input amplitude detection
sensitivity and the LOS_LVL voltage.
Hysteresis
The SY88703V provides typically 4.6dB LOS electrical
hysteresis. By definition, a power ratio measured in dB is
10log(power ratio). Power is calculated as V^2IN/R for an
electrical signal. Hence the same ratio can be stated as
20log(voltage ratio). While in linear mode, the electrical
voltage input changes linearly with the optical power and
hence the ratios change linearly. Therefore, the optical
hysteresis in dB is half the electrical hysteresis in dB given
in the datasheet. The SY88703V provides typically 2.3dB
LOS optical hysteresis. As the SY88703V is an electrical
device, this datasheet refers to hysteresis in electrical terms.
With 6dB LOS hysteresis, a voltage factor of two is required
to assert or deassert LOS.
M9999-072505
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