SY88149HL_10 Datasheet, PDF (5/11 Pages) Micrel Semiconductor – 3.3V 1.25Gbps Burst-Mode Limiting

Micrel, Inc.
SY88149HL
AC Electrical Characteristics
V_CC = 3.0V to 3.6V; R_LOAD = 50Ω to V_CC–2V; T_A = –40°C to +85°C.
Symbol Parameter
Condition
Min
Typ
Max Units
tr, tf
Output Rise/Fall Time
(20% to 80%)
Note 4
260
ps
tJAM_LH
JAM Low to High Propagation Time Note 12
5
ns
tJAM_HL
JAM High to Low Propagation Time Note 13
2
ns
tAUTORESET
tRESET
SD de-assert or LOS assert with Auto
Reset enabled.
RESET time constant
Note 5
75
100
150
ns
5
ns
tON
SD Assert Time/LOS De-assert time Note 9
5
ns
tJITTER
Deterministic
Random
Note 6
Note 7
15
psPP
5
psRMS
VID
Differential Input Voltage Swing
Figure 1
4
1800 mVPP
VOD
Differential Output Voltage Swing
VID > 18mVPP
1500
mVPP
SDAL
/LOSDL
Low SD Assert/LOS De-assert Level RLOS/SDLVL = 5kΩ, Note 8, 10
4.2
mVPP
SDDL//
LOSAL
Low SD De-assert/LOS Assert Level RLOS/SDLVL = 5kΩ, Note 10
3
mVPP
HYSL
Low SD/LOS Hysteresis
RLOS/SDLVL = 5kΩ, Note 11
2.9
dB
SDAM/
LOSDM
Medium SD Assert/LOS
De-assert Level
RLOS/SDLVL = 2.5kΩ, Note 10
5.2
12
mVPP
SDDM/
LOSAM
Medium SD De-assert/LOS Assert
Level
RLOS/SDLVL = 2.5kΩ, Note 10
2.5
3.7
mVPP
HYSM
Medium SD/LOS Hysteresis
RLOS/SDLVL = 2.5kΩ, Note 11
3
dB
SDAH/
LOSDH
High SD Assert/LOS De-assert Level RLOS/SDLVL = 50Ω, Note 10
15
24
mVPP
SDDH/
LOSAH
High SD De-assert/ LOS Assert Level RLOS/SDLVL = 50Ω, Note 10
6
9.5
mVPP
HYSH
High SD/LOS Hysteresis
RLOS/SDLVL = 50Ω, Note 11
4
dB
B-3dB
3dB Bandwidth
1
GHz
AV(Diff)
Differential Voltage Gain
48
dB
S21
Single-ended Small-Signal Gain
42
dB
Notes:
4. Amplifier in limiting mode. Input is a 200MHz square wave.
5. The time between applying RESET and outputs being disabled.
6. Deterministic jitter measured using 1.25Gbps K28.5 pattern, VID = 10mVPP.
7. Random jitter measured using 1.25Gbps K28.7 pattern, VID = 10mVPP.
8. SD is the opposite polarity of LOS. Therefore, an SD Assert parameter is equivalent to a LOS De-assert parameter and vice versa.
9. See “Typical Operating Characteristics” for graphs showing input signal vs. SD Assert/LOS De-assert time at various RLOS/SDLVL settings.
10. See “Typical Operating Characteristics” for a graph showing how to choose a particular RLOS/SDLVL for a particular assert and
its associated de-assert amplitude.
11. This specification defines electrical hysteresis as 20log (SD Assert/SD De-assert). The ratio between optical hysteresis and electrical hysteresis is
found to vary between 1.5 and 2 depending upon the level of received optical power and ROSA characteristics. Based upon that ratio, the optical
hysteresis corresponding to the electrical hysteresis range 2dB-5dB, shown in the AC characteristics table, will be: 1dB-4dB optical Hysteresis.
12. JAM Low to High transition propagation delay refers to the time it takes from a LOW to HIGH transition at JAM input to turning on (if SD is selected)
or turning off (if LOS is selected) the LVPECL outputs.
13. JAM High to Low transition propagation delay refers to the time it takes from a HIGH to LOW transition at JAM input to turning off (if SD is selected)
or turning on (if LOS is selected) the LVPECL outputs.
June 2010
5
M9999-061110-I
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