MIC5018 Datasheet, PDF (5/7 Pages) Micrel Semiconductor – IttyBitty™ High-Side MOSFET Driver Preliminary Information

MIC5018
Functional Diagram
+2.7V to +9V
Micrel
VS
I1
20µA
D2
35V
Q1
On
CTL R1 2k
Off
Q2
D1
16V
R2
15k
EN CHARGE
PUMP
MIC5018
G
D3 16V
Q3
GND
Functional Diagram with External Components
(High-Side Driver Configuration)
5
Functional Description
Refer to the functional diagram.
The MIC5018 is a noninverting device. Applying a logic high
signal to CTL (control input) produces gate drive output. The
G (gate) output is used to turn on an external N-channel
MOSFET.
Supply
VS (supply) is rated for +2.7V to +9V. An external capacitor
is recommended to decouple noise.
Control
CTL (control) is a TTL compatible input. CTL must be forced
high or low by an external signal. A floating input may cause
unpredictable operation.
A high input turns on Q2, which sinks the output of current
source I1, making the input of the first inverter low. The
inverter output becomes high enabling the charge pump.
Charge Pump
The charge pump is enabled when CTL is logic high. The
charge pump consists of an oscillator and voltage quadrupler
(4×). Output voltage is limited to 16V by a zener diode. The
charge pump output voltage will be approximately:
V_G = 4 × V_SUPPLY – 2.8V, but not exceeding 16V.
The oscillator operates from approximately 70kHz to approxi-
mately 100kHz depending upon the supply voltage and
temperature.
Gate Output
The charge pump output is connected directly to the G (gate)
output. The charge pump is active only when CTL is high.
When CTL is low, Q3 is turned on by the second inverter and
discharges the gate of the external MOSFET to force it off.
If CTL is high, and the voltage applied to VS drops to zero, the
gate output will be floating (unpredictable).
ESD Protection
D1 and D2 clamp positive and negative ESD voltages. R1
isolates the gate of Q2 from sudden changes on the CTL
input. Q1 turns on if the emitter (CTL input) is forced below
ground to provide additional input protection. Zener D3 also
clamps ESD voltages for the gate (G) output.
1997
5-159