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MIC2777_05 Datasheet, PDF (5/8 Pages) Micrel Semiconductor – Dual Micro-Power Low Voltage Supervisor
MIC2777
Functional Diagram
VDD
VREF
IN
VREF
GND
Micrel, Inc.
RQ
Delay
Line
One Shot
S /Q
/RST
RST
MIC2777
Functional Description
IN, Under-Voltage Detector Input
The voltage present at the IN pin is compared to the internal
300mV reference voltage. A reset is triggered if and when VIN
falls below VREF. Typically, a resistor divider is used to scale
the input voltage to be monitored such that VIN will fall below
VREF as the voltage being monitored falls below the desired
trip-point. Hysteresis is employed to prevent chattering due
to noise. The comparator on the IN input is relatively immune
to very brief negative-going transients.
VDD Input
The VDD pin is both the power supply terminal and a monitored
input voltage. The voltage at this pin is continually compared
against the internal reference. The trip-point at which a reset
occurs is factory programmed. A reset is triggered if and
when VDD falls below the trip-point. Hysteresis is employed
to prevent chattering due to noise. The comparator on the
VDD input is relatively immune to very brief negative-going
transients.
RST, /RST Reset Output
Typically, the MIC2777 is used to monitor the power supplies
of intelligent circuits such as microcontrollers and micropro-
cessors. By connecting the appropriate reset output of a
MIC2777 to the reset input of a µC or µP, the processor will
be properly reset at power-on and during power-down and
brown-out conditions.
The reset outputs are asserted any time VDD or VIN drops
below the corresponding threshold voltage. The reset outputs
remain asserted for tRST(min) after VIN and/or VDD subsequent
return above the threshold boundaries and/or /MR is released.
A reset pulse is also generated at power-on.
Manual Reset
The ability to initiate a reset via external logic or a manual
switch is provided in addition to the MIC2777’s automatic
supervisory functions. Typically, a momentary push-button
switch is connected such that IN is shorted to ground when
the switch contacts close. Assuming VDD and VIN are within
tolerance when the switch is released, the reset outputs will
be de-asserted no less than 140ms later. IN can also be driven
by an open-drain or open-collector logic signal.
November 2005
5
MIC2777