MIC2564A_04 Datasheet, PDF (5/14 Pages) Micrel Semiconductor – Dual Serial PCMCIA/CardBus Power Controller

MIC2564A
Symbol
Parameter
Conditions
Thermal Shutdown
T_SD
Thermal Shutdown Temperature
Serial Interface DC Specifications
V_IH
V_IL
I_IN
Flag
Input Voltage: SDA, SCL, SLA pins
Input Voltage: SDA, SCL, SLA pins
Input Current
0V < V_IN < 5.5V
I_FLG
Flag Leakage Current
V_FLG = 5V
Serial Interface Timing Requirements (See Figures 1 and 2)⁽¹⁴⁾
t_HD:DAT
t_SU:DAT
t_SU:SLA
t_SU:RST#
t_W
SDA Hold Time
SDA Setup Time
Latch Setup Time
Reset to Data Setup Time
Minimum Pulse Width
t_R
SCL Rise Time
t_F
SCL Fall Time
Data before clock
RST# before data
Clock (t_W:CLK)
Latch (t_W:SLA)
Reset (t_W:RST)
Data (t_W:DA)
f = 32kHz⁽¹⁵⁾
f = 32kHz⁽¹⁵⁾
Notes:
14. Guaranteed by design not production tested.
15. Guaranteed by characterization but not production tested.
Micrel
Min Typ Max Units
145
∞C
0.7V_CC3IN
5.5
V
–0.3
0.3V_CC3IN V
–1
0.2
1
mA
1
mA
75
ns
75
ns
50
ns
50
ns
50
ns
100
ns
50
ns
50
ns
0
100
ns
0
100
ns
Serial Control Timing Diagram
t_W:DAT
RST#
SDA
t_SU:RST#
D8
D7 D6
D5
D4
D3
D2
D1
D0
SLA
t_SU:DAT
t_HD:DAT
t_W:CLK
t_SU:SLA
t_W:SLA
SCL
Figure 1. Serial Control Timing Diagram
The MIC2564A uses a three-wire serial interface to control V_CC and V_PP outputs for both sections A and B. The three control
lines have thresholds compatible with both 3.3V and 5V logic families. Data (SDA) is clocked in on the rising clock edge. The
clock signal may be continuous or it may halt after all data is clocked in.
SCL
t_r
90%
10%
t_f
90%
10%
Figure 2. SCL Rise and Fall Times
March 2004
5
M0250-031104