MIC2564A Datasheet, PDF (5/16 Pages) Micrel Semiconductor – Dual Serial PCMCIA/CardBus Power Controller Preliminary Information

MIC2564A
Micrel
Symbol
Parameter
Conditions
Min Typ Max Units
Serial Interface Timing Requirements (See Figure 1), Note 10
t_HD:DAT
t_SU:DAT
t_SU:SLA
t_SU:RST#
t_W
SDA Hold Time
SDA Setup Time
Latch Setup Time
Reset to Data Setup Time
Minimum Pulse Width
data before clock
RST# before data
clock (t_W:CLK)
latch (t_W:SLA)
reset (t_W:RST)
data (t_W:DA)
75
ns
75
ns
50
ns
50
ns
50
ns
100
ns
50
ns
50
ns
Note 1. Exceeding the absolute maximum rating may damage the device.
Note 2. The device is not guaranteed to function outside its operating rating.
Note 3. Devices are ESD sensitive. Handling precautions recommended.
Note 4. Output enabled into short circuit.
Note 5. Measurement is from the 50% point of the SLA rising edge.
Note 6. Measurement is from the Hi-Z- or 0V-state command to the beginning of the slope. Measurement does not apply when device is in current
limit or thermal shutdown.
Note 7. V_CC3 IN powers all internal logic, bias, and drive circuitry, and is required for operation.
Note 8. V_PP and V_CC5 IN are not required for operation.
Note 9. V_PP IN must be either high impedance or greater than or approximately equal to the highest voltage V_CC in the system. For example, if both
3.3V and 5V are connected to the MIC2564A, V_PP IN must be either 5V, 12V, or high impedance.
Note 10. Guaranteed by design not production tested.
Serial Control Timing Diagram
t_W:DAT
RST#
SDA
t_SU:RST#
D8
D7 D6
D5
D4
D3
D2
D1
D0
SLA
t_SU:DAT
t_HD:DAT
t_W:CLK
t_SU:SLA
t_W:SLA
SCL
Figure 1. Serial Control Timing Diagram
The MIC2564A uses a three-wire serial interface to control V_CC and V_PP outputs for both sections A and B. The three control
lines have thresholds compatible with both 3.3V and 5V logic families. Data (SDA) is clocked in on the rising clock edge. The
clock signal may be continuous or it may halt after all data is clocked in.
September 1999
5
MIC2564A