MIC5891 Datasheet, PDF (4/4 Pages) Micrel Semiconductor – 8-Bit Serial-Input Latched Source Driver

MIC5891
CLOCK
DATA IN
STROBE
OUTPUT
ENABLE
OUTN
A
D
B
E
F
C
G
Timing Conditions
H
I
Micrel
Truth Table
Serial
Data
Input
Clock
Input
Shift Register Contents
I1 I2 I3 … IN-1 IN
Serial
Data Strobe
Output Input
Latch Contents
I1 I2 I3 … IN-1 In
Output
Enable
Output Content
I1 I2 I3 … IN-1 In
H
H R1 R2 … RN-2 RN-1
RN-1
L
L R1 R2 … RN-2 RN-1
RN-1
X
R1 R2 R3 … RN-1 RN
RN
XXX …XX
X
L
R1 R2 R3 … RN-1 RN
7
P1 P2 P3 … PN-1 PN
PN
H
P1 P2 P3 … PN-1 PN
L
P1 P2 P3 … PN-1 PN
X X X…X X H
L L L… L L
L = Low Logic Level
H = High Logic Level
X = Irrelevant
P = Present State
R = Previous State
Applications Information
Serial data present at the input is transferred into the shift
register on the rising edge of the CLOCK input pulse. Additional
CLOCK pulses shift data information towards the SERIAL
DATA OUTPUT. The serial data must appear at the input prior
to the rising edge of the CLOCK input waveform.
The 8 bits present in the shift register are transferred to the
respective latches when the STROBE is high (serial-to-
parallel conversion). The latches will continue to accept new
data as long as the STROBE is held high. Most applications
where the latching feature is not used (STROBE tied high)
require the OUTPUT ENABLE input to be high during serial
data entry.
Outputs are active (controlled by the latch state) when the
OUTPUT ENABLE is low. All Outputs are low (disabled) when
the OUTPUT ENABLE is high. OUTPUT ENABLE does not
affect the data in the shift register or latch.
December 1997
7-57