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MIC5800_05 Datasheet, PDF (4/9 Pages) Micrel Semiconductor – 4/8-Bit Parallel-Input Latched Drivers
MIC5800/5801
Micrel, Inc.
Electrical Characteristics (Note 1): at TA = +25°C, VDD = 5V (unless otherwise noted)
Limits
Characteristic
Symbol
Test Conditions
Min. Typ. Max. Units
Output Leakage Current
ICEX
VCE = 50 V, TA = +25°C
50 µA
VCE = 50 V, TA = +70°C
100
Collector-Emitter
VCE(SAT)
IC = 100 mA
0.9
1.1 V
Saturation Voltage
IC = 200 mA
1.1
1.3
IC = 350 mA, VDD = 7.0 V
1.3
1.6
Input Voltage
VIN(0)
1.0 V
VIN(1)
VDD = 12 V
10.5
VDD = 10 V
8.5
VDD = 5.0 V (See Note)
3.5
Input Resistance
RIN
VDD = 12 V
50
200
kΩ
VDD = 10 V
50
300
VDD = 5.0 V
50
600
Supply Current
IDD(ON)
VDD = 12 V, Outputs Open
1.0
2.0 mA
(Each
VDD = 10 V, Outputs Open
0.9
1.7
Stage)
VDD = 5.0 V, Outputs Open
0.7
1.0
IDD(OFF)
VDD = 12 V, Outputs Open, Inputs = 0 V
200 µA
(Total)
VDD = 5.0 V, Outputs Open, Inputs = 0 V
50
100
Clamp Diode
IR
VR = 50 V, TA = +25°C
50 µA
Leakage Current
VR = 50 V, TA = +70°C
100
Clamp Diode Forward Voltage VF
IF = 350 mA
1.7
2.0 V
NOTE : Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure a minimum logic “1”.
NOTE 1: Specification for packaged product only.
CLEAR
STROBE
OUTPUT
ENABLE
INN
OUTN
A
C
B
G
CB
D
E
F
AC
B
G
E
Timing Conditions
(Logic Levels are VDD and Ground)
A. Minimum data active time before strobe enabled (data set-up time) ....................................................................... 50ns
B. Minimum data active time after strobe disabled (data hold time) ............................................................................. 50ns
C. Minimum strobe pulse width ................................................................................................................................... 125ns
D. Typical time between strobe activation and output on to off transition ................................................................... 500ns
E. Typical time between strobe activation and output off to on transition ................................................................... 500ns
F. Minimum clear pulse width ..................................................................................................................................... 300ns
G. Minimum data pulse width ...................................................................................................................................... 225ns
MIC5800/5801
4
March 2005