MIC502 Datasheet, PDF (4/11 Pages) Micrel Semiconductor – Fan Management IC Advance Information

MIC502
Micrel
Symbol
Parameter
Condition
Min Typ Max Units
Overtemperature Fault Output
V_OL
Active (Low) Output Voltage
I_OL = 2mA
I_OH
Off-State Leakage
V_/OTF = V_DD
0.3
V
1
µA
Note 1.
Note 2.
Note 3.
Note 4:
Note 5.
Note 6.
Note 7.
Exceeding the absolute maximum rating may damage the device.
The device is not guaranteed to function outside its operating rating.
Devices are ESD sensitive. Handling precautions recommended.
Part is functional over this V_DD range; however, it is characterized for operation at 4.5V ≤ V_DD ≤ 5.5V and 10.8V ≤ V_DD ≤ 13.2V ranges. These
ranges correspond to nominal V_DD of 5V and 12V, respectively.
Guaranteed by design.
V_OT is guaranteed by design to always be higher than V_PWM(max).
Logic time base and PWM frequency. For other values of C_F,
f(Hz)
=
30Hz ^0.1µF , where C is in µF.
C
Timing Diagrams
V_OT
0.7V_DD
V_T1
V_T2
V_SLP
0.3V_DD
V_IH
V_IL
0V
50%
80%
40%
70%
40%
100%
Input
Signal
Range
30%
0%
V_OTF
V_OH
V_OL
0V
V_OUT
A
V_OH
V_OL
0V
t_PWM
50%
F
B
C
D
E
t_STARTUP
G
80%
40%
70%
0%
Figure 1. Typical System Behavior
100%
40%
Output
Duty Cycle
Note A.
Note B.
Note C.
Note D.
Note E.
Note F.
Note G.
Output duty-cycle is initially determined by V_T1, as it is greater than V_T2.
PWM duty-cycle follows V_T1 as it increases.
V_T1 drops below V_T2. V_T2 now determines the output duty-cycle.
The PWM duty-cycle follows V_T2 as it increases.
Both V_T1 and V_T2 decrease below V_SLP but above V_IL. The device enters sleep mode.
The PWM ‘wakes up’ because one of the control inputs (V_T1 in this case) has risen above V_WAKE. The startup timer is triggered, forcing OUT
high for 64 clock periods. (V_WAKE = V_SLP + V_HYST. See “Electrical Characteristics.”)
Following the startup interval, the PWM duty-cycle is the higher of V_T1 and V_T2.
MIC502
166
May 1999