KSZ8995MAFQ Datasheet, PDF (34/89 Pages) Micrel Semiconductor – Integrated 5-Port 10/100 Managed Switch

Micrel, Inc.
KS8995MA/FQ
SNI Signal
MTXEN
MTXER
MTXD3
MTXD2
MTXD1
MTXD0
MTXC
MCOL
MCRS
MRXDV
MRXER
MRXD3
MRXD2
MRXD1
MRXD0
MRXC
MDC
MDIO
Description
Transmit Enable
Transmit Error
Transmit Data Bit 3
Transmit Data Bit 2
Transmit Data Bit 1
Transmit Data Bit 0
Transmit Clock
Collision Detection
Carrier Sense
Receive Data Valid
Receive Error
Receive Data Bit 3
Receive Data Bit 2
Receive Data Bit 1
Receive Data Bit 0
Receive Clock
Management Data Clock
Management Data I/O
KS8995MA/FQ Signal
PMTXEN
PMTXER
PMTXD[3]
PMTXD[2]
PMTXD[1]
PMTXD[0]
PMTXC
PCOL
PCRS
PMRXDV
PMRXER
PMRXD[3]
PMRXD[2]
PMRXD[1]
PMRXD[0]
PMRXC
MDC
MDIO
Table 1. MII − P5 Signals (PHY Mode)
Table 2 illustrates three different connection approaches:
1.
The first and second columns show the connections for external MAC and MII-SW PHY mode.
2.
The fourth and fifth columns show the connections for external PHY and MII-SW MAC mode.
3.
The second and fifth columns shows the back-to-back connections for two MII-SW MACs of two devices.
December 2012
34
M9999-121212-3.0