SY58021U_10 Datasheet, PDF (3/13 Pages) Micrel Semiconductor – 4GHz, 1:4 LVPECL Fanout Buffer/Translator with Internal Termination Precision Edge

Micrel, Inc.
SY58021U
Pin Description
Pin Number
1, 4
2
3
8, 13
5, 16
14, 15, 11, 12,
9, 10, 6, 7
Pin Name
IN, /IN
VT
VREF-AC
VCC
GND,
Exposed Pad
/Q0, Q0, /Q1,
Q1, /Q2, Q2,
/Q3, Q3
Pin Function
Differential Input: This input pair receives the signal to be buffered. Each pin of this pair internally
terminates with 50Ω to the VT pin. Note that this input will default to an indeterminate state if left
open. See “Input Interface Applications” section.
Input Termination Center-Tap: Each input terminates to this pin. The VT pin provides a center-tap
for each input (IN, /IN) to the termination network for maximum interface flexibility. See “Input
Interface Applications” section.
Reference Output Voltage: This output biases to VCC –1.2V. It is used when AC-coupling to
differential inputs. Connect VREF-AC directly to the VT pin. Bypass with 0.01µF low ESR capacitor
to VCC. See “Input Interface Applications” section.
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to the VCC pins
as possible.
Ground. Exposed pad must be connected to a ground plane that is the same potential as the
ground pin.
LVPECL Differential Output Pairs: Differential buffered output copy of the input signal. The output
swing is typically 800mV Proper termination is 50 Ω to VCC–2V at the receiving end. Unused
output pairs may be left floating with no impact on jitter or skew. See “LVPECL Output
Termination” section.
August 2010
3
M9999-080510-A
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