SM802110 Datasheet, PDF (3/7 Pages) Micrel Semiconductor – ClockWorks™ CPRI 153.6MHz Ultra-Low Jitter, LVPECL Frequency Synthesizer

Micrel, Inc.
SM802110
Absolute Maximum Ratings⁽¹⁾
Supply Voltage (V_DD, V_DDO) .........................................+4.6V
Input Voltage (V_IN) .............................. −0.50V to V_DD + 0.5V
Lead Temperature (soldering, 20sec.)....................... 260°C
Case Temperature ..................................................... 115°C
Storage Temperature ................................–65°C to +150°C
Operating Ratings⁽²⁾
Supply Voltage (V_DD, V_DDO) .................. +2.375V to +3.465V
Ambient Temperature (T_A) .......................... –40°C to +85°C
Junction Thermal Resistance⁽³⁾
QFN (θ_JA)
Still-Air ......................................................... 50°C/W
QFN (ψ_JA)
Junction-to-Board ........................................ 30°C/W
DC Electrical Characteristics⁽⁴⁾
V_DD = V_DDO = 3.3V ±5% or 2.5V ±5%
V_DD = 3.3V ±5%, V_DDO= 3.3V ±5% or 2.5V ±5%
T_A = −40°C to +85°C.
Symbol
Parameter
V_DD, V_DDO 2.5V Operating Voltage
V_DD, V_DDO 3.3V Operating Voltage
I_DD
Supply current, V_DD + V_DDO
Condition
Outputs open
Min.
2.375
3.135
Typ.
2.5
3.3
77
Max.
2.625
3.465
98
Units
V
V
mA
LVPECL DC Electrical Characteristics⁽⁴⁾
V_DD = V_DDO = 3.3V ±5% or 2.5V ±5%
V_DD = 3.3V ±5%, V_DDO = 3.3V ±5% or 2.5V ±5%
T_A = −40°C to +85°C. R_L = 50Ω to V_DDO − 2V
Symbol
Parameter
V_OH
Output High Voltage
V_OL
Output Low Voltage
V_SWING
Output Voltage Swing
Condition
Min.
V_DDO – 1.145
V_DDO – 1.945
0.6
Typ.
V_DDO – 0.97
V_DDO – 1.77
0.8
Max.
V_DDO – 0.845
V_DDO – 1.645
1.0
Units
V
V
V
Note:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
4. The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established.
January 2011
3
M9999-012111-A
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