PL602041_14 Datasheet, PDF (3/9 Pages) Micrel Semiconductor – ClockWorks™ PCIe Quad Outputs Ultra-Low Jitter, HCSL Frequency Synthesizer

Micrel, Inc.
PL602041
Absolute Maximum Ratings⁽²⁾
Supply Voltage (V_DD, V_DDO1/2) ......................................+4.6V
Input Voltage (V_IN) .............................. 0.50V to V_DD + 0.5V
Lead Temperature (soldering, 20s)............................ 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (T_S)......................... 65C to 150°C
Operating Ratings⁽³⁾
Supply Voltage (V_DD, V_DDO1/2) ............... +2.375V to +3.465V
Ambient Temperature (T_A) .......................... –40°C to +85°C
Junction Thermal Resistance⁽⁴⁾
QFN (_JA) Still Air ............................................... 50°C/W
QFN (_JB) Junction-to-Board ............................. 30°C/W
DC Electrical Characteristics⁽⁵⁾
VDD = VDDO1/2 = 3.3V 5% or 2.5V 5%
VDD = 3.3V 5%, VDDO1/2 = 3.3V 5% or 2.5V 5%
TA = 40C to 85C.
Symbol
Parameter
Condition
VDD, VDDO1/2
VDD, VDDO1/2
IDD
2.5V Operating Voltage
2.5V Operating Voltage
Supply Current to VDD + VDDO
Outputs 50Ω to VSS
Min.
2.375
3.135
Typ.
2.5
3.3
150
Max.
2.625
3.465
185
Units
V
V
mA
HCSL DC Electrical Characteristics⁽⁵⁾
VDD = VDDO1/2 = 3.3V 5% or 2.5V 5%
VDD = 3.3V 5%, VDDO1/2 = 3.3V 5% or 2.5V 5%
TA = 40C to 85C. RL = 50Ω to VSS
Symbol Parameter
Condition
VOH
VOL
VCROSS
Output High Voltage
Output Low Voltage
Crossing Point Voltage
Min.
660
150
250
Typ.
700
0
350
Max.
850
27
550
Units
mV
mV
mV
LVCMOS (S0, S1) DC Electrical Characteristics⁽⁶⁾
VDD = 3.3V 5%, or 2.5V 5%, TA = 40C to 85C.
Symbol Parameter
Condition
Min. Typ.
Max.
Units
VIH
Input High Voltage
2
VDD + 0.3
V
VIL
Input Low Voltage
0.3
0.8
V
IIH
Input High Current
VDD = VIN = 3.465V
150
A
IIL
Input Low Current
VDD = 3.465V, VIN = 0V
150
A
Notes:
2. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
3. The datasheet limits are not guaranteed if the device is operated beyond operating ratings.
4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB.
5. The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established.
6. All phase noise measurements were taken with an Agilent 5052B phase noise system.
January 28, 2014
3
Revision 1.3
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