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MIC5248_06 Datasheet, PDF (3/10 Pages) Micrel Semiconductor – 150mA μCap CMOS LDO Regulator w/Power Good
Micrel, Inc.
MIC5248
Absolute Maximum Ratings(1)
Supply Input Voltage (VIN).................................... 0V to +7V
Enable Input Voltage (VEN)..................................... 0V to VIN
Flag Output Voltage (VPG) ...................................... 0V to VIN
Junction Temperature (TJ) ....................................... +150°C
Storage Temperature (TS).........................–65°C to +150°C
Lead Temperature (soldering, 5sec.)......................... 260°C
EDS Rating(3)
Operating Ratings(2)
Input Voltage (VIN)........................................... +2.7V to +6V
Enable Input Voltage (VEN)..................................... 0V to VIN
Flag Output Voltage (VPG) ...................................... 0V to VIN
Junction Temperature (TJ) ........................ –40°C to +125°C
Thermal Resistance
SOT-23-5 (θJA).................................................235°C/W
MLF-6 (θJA) ......................................................100°C/W
Electrical Characteristics
VIN = 2.7V, VEN = VIN; IOUT = 100µA; TJ = 25°C, bold values indicate –40°C< TJ < +125°C, unless noted.
Symbol Parameter
Condition
Min Typ Max Units
VO
Output Voltage Accuracy
IOUT = 100µA
–3
3
%
–4
4
%
∆VLNR
∆VLDR
Line Regulation
Load Regulation
VIN = 2.7V to 6V
IOUT = 0.1mA to 150mA, Note 4
–0.3
0
0.3
%/V
4.0
5.0
%
IQ
Quiescent Current
VEN ≤ 0.4V (shutdown)
IGND
Ground Pin Current, Note 5
IOUT = 0mA; VIN = 6.0V
0.45
1
µA
100 150
µA
IOUT = 150mA; VIN = 6.0V
100 150
µA
PSRR
Power Supply Rejection
f = 120Hz, COUT = 4.7µF, IOUT = 150mA
60
dB
ILIM
Current Limit
Enable Input
VOUT = 0V
160 350
mA
VIL
Enable Input Logic-Low Voltage VIN = 5.5V, regulator shutdown
VIH
Enable Input Logic-High Voltage VIN = 5.5V, regulator enabled
0.4
V
1.6
V
IEN
Enable Input Current
VIL ≤ 0.4V; VIN = 5.5V
VIH ≥ 1.6V; VIN = 5.5V
0.01
µA
0.01
µA
Thermal Protection
Thermal Shutdown Temperature
150
°C
Thermal Shutdown Hysteresis
10
°C
Power Good, Note 6
VPG
Low Threshold
High Threshold
% of VOUT (PG ON)
% of VOUT (PG OFF)
89.5
%
96.5
%
VOL
PG Output Logic-Low Voltage
IL = 100µA, fault condition
IPG
Power Good Leakage Current
power good off, VPG = 5.5V
0.02
0.1
V
0.01
µA
VPG Delay Delay Time to Power Good
See “Timing Diagram”
1
5
ms
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside its operating rating.
3. Devices are ESD sensitive. Handling precautions recommended.
4. Regulation is measured at constant junction temperature using low duty cycle pulse testing. Parts are tested for load regulation in the loadrange from
0.1mA to 150mA. Changes in output voltage due to heating effects are covered by the thermal regulation specification.
5. Ground pin current is the regulator quiescent current. The total current drawn from the supply is the sum of the load current plus the groundpin
current.
6. The power good is a function of the output voltage being 5% low and the detection of one of the following: overcurrent, over-temperature ordropout.
See “Applications Information” section for additional information.
August 2006
3
M9999-080106