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MIC5013_05 Datasheet, PDF (3/15 Pages) Micrel Semiconductor – Protected High- or Low-Side MOSFET Driver
MIC5013
Micrel, Inc.
Electrical Characteristics (Note 3, 5)
Test circuit. TA = –55°C to +125°C, V+ = 15V, all switches open, unless otherwise specified.
Parameter
Supply Current, I7
Logic Input Voltage, VIN
Logic Input Current, I1
Input Capacitance
Conditions
V+ = 32V
V+ = 4.75V
V+ =15V
V+ = 32V
Pin 1
VIN = 0V, S4 closed
VIN = VS = 32V
Adjust VIN for VGATE low
Adjust VIN for VGATE high
Adjust VIN for VGATE high
VIN = 0V
VIN = 32V
Min Typical Max
0.1
10
8
20
2
4.5
5.0
–1
1
5
Units
µA
mA
V
V
V
µA
µA
pF
Gate Drive, VGATE
Zener Clamp,
VGATE – VSOURCE
Gate Turn-on Time, tON
µs
(Note 4)
Gate Turn-off Time, tOFF
Threshold Bias Voltage, V2
Current Sense Trip Voltage,
VSENSE – VSOURCE
S1, S2 closed,
V+ = 7V, I6 = 0
VS = V+, VIN = 5V
V+ = 15V, I6 = 100 µA
S2 closed, VIN = 5V V+ = 15V, VS = 15V
V+ = 32V, VS = 32V
VIN switched from 0 to 5V; measure time
for VGATE to reach 20V
VIN switched from 5 to 0V; measure time
for VGATE to reach 1V
I2 = 200 µA
S2 closed, VIN = 5V,
V+ = 7V,
S4 closed
Increase I3
I2 = 100 µA
V+ = 15V
VS = 4.9V, S4 open
S4 closed
13
15
V
24
27
V
11 12.5 15
V
11
13
16
V
60
200
4
10
µs
1.7
2
2.2
V
75
105 135
mV
70
100 130
mV
150 210 270 mV
I2 = 200 µA VS = 11.8V, S4 open
140
200
260
mV
V+ = 32V
VS = 0V, S4 open
360 520 680 mV
I2 = 500 µA VS = 25.5V, S4 open
350
500
650
mV
Peak Current Trip Voltage,
VSENSE – VSOURCE
S3, S4 closed,
V+ = 15V, VIN = 5V
1.6
2.1
V
Fault Output Voltage, V8
VIN = 0V, I8 = –100 µA
0.4
1
V
VIN = 5V, I8 = 100 µA, current sense tripped
14 14.6
V
Note 1. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when
operating the device beyond its specified Operating Ratings.
Note 2. The MIC5010 is ESD sensitive.
Note 3. Minimum and maximum Electrical Characteristics are 100% tested at TA = 25°C and TA = 85°C, and 100% guaranteed over the entire
range. Typicals are characterized at 25°C and represent the most likely parametric norm.
Note 4. Test conditions reflect worst case high-side driver performance. Low-side and bootstrapped topologies are significantly faster—see
Applications Information.
Note 5. Specification for packaged product only.
July 2005
3
MIC5013