MIC28304 Datasheet, PDF (3/39 Pages) Micrel Semiconductor – 70V 3A Power Module

Micrel, Inc.
MIC28304
Pin Description (Continued)
Pin Number
7, 8
9 to 13
14 to 22
23 to 38
39
49, 50
52, 53
55, 56
57
58
59
61, 62
63
Pin Name
FREQ
PGND
PVIN
VOUT
NC
ANODE
BSTC
BSTR
FB
PGOOD
EN
PVDD
NC
Pin Function
Switching Frequency Adjust Input. Leaving this pin open will set the switching frequency to 600kHz.
Alternatively a resistor from this pin to ground can be used to lower the switching frequency.
Power Ground. PGND is the return path for the buck converter power stage. The PGND pin
connects to the sources of low-side N-Channel external MOSFET, the negative terminals of input
capacitors, and the negative terminals of output capacitors. The return path for the power ground
should be as small as possible and separate from the analog ground (GND) return path.
Power Input Voltage. Connection to the drain of the internal high-side power MOSFET.
Output Voltage. Connection with the internal inductor, the output capacitor should be connected
from this pin to PGND as close to the module as possible.
No Connection. Leave it floating.
Anode Bootstrap Diode Input. Anode connection of internal bootstrap diode, this pin should be
connected to the PVDD pin.
Bootstrap Capacitor. Connection to the internal bootstrap capacitor. Leave floating, no connect.
Bootstrap Resistor. Connection to the internal bootstrap resistor and high-side power MOSFET
drive circuitry. Leave floating, no connect.
Feedback Input. Input to the transconductance amplifier of the control loop. The FB pin is regulated
to 0.8V. A resistor divider connecting the feedback to the output is used to set the desired output
voltage.
Power Good Output. Open drain output, an external pull-up resistor to external power rails is
required.
Enable Input. A logic signal to enable or disable the buck converter operation. The EN pin is CMOS
compatible. Logic high enables the device, logic low shutdowns the regulator. In the disable mode,
the input supply current for the device is minimized to 4µA typically. Do not pull EN to PVDD.
Internal +5V Linear Regulator Output. PVDD is the internal supply bus for the device. In the
applications with VIN < +5.5V, PVDD should be tied to VIN to by-pass the linear regulator.
No Connection. Leave it floating.
March 25, 2014
3
Revision 1.1