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MIC45208 Datasheet, PDF (23/31 Pages) Micrel Semiconductor – 26V 10A DC-to-DC Power Module | |||
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Micrel, Inc.
MIC45208
PCB Layout Guidelines
Warning: To minimize EMI and output noise, follow
these layout recommendations.
PCB layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to control
EMI and minimize the inductance in power, signal and
return paths.
Figure 16 is optimized from a small form factor point of
view shows top and bottom layer of a four-layer PCB. It is
recommended to use mid layer 1 as a continuous ground
plane.
Figure 16. Top And Bottom Layer of a Four-Layer Board
The following guidelines should be followed to insure
proper operation of the MIC45208 module:
IC
ï· The analog ground pin (GND) must be connected
directly to the ground planes. Place the IC close to the
point-of-load (POL).
ï· Use thick traces to route the input and output power
lines.
ï· Analog and power grounds should be kept separate
and connected at only one location with low
impedance.
Input Capacitor
ï· Place the input capacitors on the same side of the
board and as close to the IC as possible.
ï· Place several vias to the ground plane close to the
input capacitor ground terminal.
ï· Use either X7R or X5R dielectric input capacitors. Do
not use Y5V or Z5U type capacitors.
ï· Do not replace the ceramic input capacitor with any
other type of capacitor. Any type of capacitor can be
placed in parallel with the ceramic input capacitor.
ï· If a non-ceramic input capacitor is placed in parallel
with the input capacitor, it must be recommended for
switching regulator applications and the operating
voltage.
ï· In âHot-Plugâ applications, an electrolytic bypass
capacitor must be used to limit the over-voltage spike
seen on the input supply with power is suddenly
applied. If hot-plugging is the normal operation of the
system, using an appropriate hot-swap IC is
recommended.
RC Snubber (Optional)
ï· Depending on the operating conditions, a RC snubber
on the same side of the board can be used. Place the
RC and as close to the SW pin as possible if needed.
SW Node
ï· Do not route any digital lines underneath or close to the
SW node.
ï· Keep the switch node (SW) away from the feedback
(FB) pin.
Output Capacitor
ï· Use a wide trace to connect the output capacitor
ground terminal to the input capacitor ground terminal.
ï· Phase margin will change as the output capacitor
value and ESR changes.
ï· The feedback trace should be separate from the power
trace and connected as close as possible to the output
capacitor. Sensing a long high-current load trace can
degrade the DC load regulation.
May 29, 2014
23
Revision 1.2
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