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MIC2009YM6-TR Datasheet, PDF (22/30 Pages) Micrel Semiconductor – Fixed and Adjustable Current Limiting Power Distribution Switches
Micrel, Inc.
Variable Undervoltage Lock Out (VUVLO)
2003 2004 2005X 2006 2007 2008
2013 2014 2015 2016 2017 2018
Only parts in bold have VUVLO.
2009X
2019X
VUVLO functions as an input voltage monitor when the
switch in enabled. The VIN pin is monitored for a drop in
voltage, indicating excessive loading of the VIN supply.
When VIN is less than the VULVO threshold voltage
(VVUVLO_TH) for 32ms or more, the MIC20XX disables
the switch to protect the supply and allow VIN to
recover. After 128ms has elapsed, the MIC20X6
enables switch. This disable and enable cycling will
continue as long as VIN deceases below the VUVLO
threshold voltage (VVUVLO_TH) which has a typical value
of 250mV. The VUVLO voltage is commonly established
by a voltage divider from VIN-to-GND.
ENABLE
2003 2004 2005X 2006
2013 2014 2015 2016
Only parts in bold have ENABLE pin.
2007
2017
2008 2009X
2018 2019X
ENABLE pin is a logic compatible input which activates
the main MOSFET switch thereby providing power to
the VOUT pin. ENABLE is either an active HIGH or active
LOW control signal. The MIC20XX can operate with
logic running from supply voltages as low as 1.5 V.
ENABLE may be driven higher than VIN, but no higher
than 5.5V and not less than –0.3V.
FAULT/
2003 2004 2005X 2006
2013 2014 2015 2016
Only parts in bold have FAULT/ pin.
2007
2017
2008 2009X
2018 2019X
FAULT/ is an N-channel open-drain output, which is
asserted (LOW true) when switch either begins current
limiting or enters thermal shutdown.
FAULT/ asserts after a brief delay when events occur
that may be considered possible faults. This delay
insures that FAULT/ is asserted only upon valid,
enduring, over-current conditions and that transitory
event error reports are filtered out.
In MIC200X FAULT/ asserts after a brief delay period,
of 32ms typical. After a fault clears, FAULT/ remains
asserted for the delay period of 32ms
MIC20xx Family
MIC201X’s FAULT/ asserts at the end of the Kickstart™
period which is 128ms typical. This masks initial current
surges, such as would be seen by a motor load starting
up. If the load current remains above the current limit
threshold after the Kickstart™ has timed out, then the
FAULT/ will be asserted. After a fault clears, FAULT/
remains asserted for the delay of 128ms.
Because FAULT/ is an open-drain it must be pulled
HIGH with an external resistor and it may be wire-OR’d
with other similar outputs, sharing a single pull-up
resistor. FAULT/ may be tied to a pull-up voltage source
which is higher than VIN, but no greater than 5.5V.
Soft-Start Control
Large capacitive loads can create significant inrush
current surges when charged through the switch. For
this reason, the MIC20XX family of switches provides a
built-in soft-start control to limit the initial inrush
currents.
Soft-start is accomplished by controlling the power
MOSFET when the ENABLE pin enables the switch.
CSLEW
2003 2004 2005X 2006 2007
2013 2014 2015 2016 2017
Only parts in bold have CSLEW pin.
(Not available in 5-pin SOT-23 packages)
2008 2009X
2018 2019X
The CSLEW pin is provided to increase control of the
output voltage ramp at turn-on. This input allows
designers the option of decreasing the output’s slew
rate (slowing the voltage rise) by adding an external
capacitance between the CSLEW and VIN pins.
Thermal Shutdown
Thermal shutdown is employed to protect the MIC20XX
family of switches from damage should the die
temperature exceed safe operating levels. Thermal
shutdown shuts off the output MOSFET and asserts the
FAULT/ output if the die temperature reaches 145°C.
The switch will automatically resume operation when the
die temperature cools down to 135°C. If resumed
operation results in reheating of the die, another
shutdown cycle will occur and the switch will continue
cycling between ON and OFF states until the overcurrent
condition has been resolved.
Depending on PCB layout, package type, ambient
temperature, etc., hundreds of milliseconds may elapse
from the incidence of a fault to the output MOSFET
being shut off. This delay is due to thermal time
constants within the system itself. In no event will the
device be damaged due to thermal overload because die
temperature is monitored continuously by on-chip
circuitry.
August 2011
22
M9999-080211-D