MIC26400_11 Datasheet, PDF (20/27 Pages) Micrel Semiconductor – 5A Hyper Speed Control Synchronous DC/DC Buck Regulator

Micrel, Inc.
PCB Layout Guidelines
Warning!!! To minimize EMI and output noise, follow
these layout recommendations.
PCB Layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to
control EMI and minimize the inductance in power,
signal and return paths.
The following guidelines should be followed to insure
proper operation of the MIC26400 converter.
IC
• The 2.2µF ceramic capacitor, which is connected to
the VDD pin, must be located right at the IC. The
VDD pin is very noise sensitive and placement of the
capacitor is very critical. Use wide traces to connect
to the VDD and PGND pins.
• The signal ground pin (SGND) must be connected
directly to the ground planes. Do not route the
SGND pin to the PGND Pad on the top layer.
• Place the IC close to the point of load (POL).
• Use fat traces to route the input and output power
lines.
• Signal and power grounds should be kept separate
and connected at only one location.
Input Capacitor
• Place the input capacitor next.
• Place the input capacitors on the same side of the
board and as close to the IC as possible.
• Keep both the PVIN and PGND connections short.
• Place several vias to the ground plane close to the
input capacitor ground terminal.
• Use either X7R or X5R dielectric input capacitors.
Do not use Y5V or Z5U type capacitors.
• Do not replace the ceramic input capacitor with any
other type of capacitor. Any type of capacitor can be
placed in parallel with the input capacitor.
• If a Tantalum input capacitor is placed in parallel
with the input capacitor, it must be recommended for
switching regulator applications and the operating
voltage must be derated by 50%.
• In “Hot-Plug” applications, a Tantalum or Electrolytic
bypass capacitor must be used to limit the over-
voltage spike seen on the input supply with power is
suddenly applied.
MIC26400
Inductor
• Keep the inductor connection to the switch node
(SW) short.
• Do not route any digital lines underneath or close to
the inductor.
• Keep the switch node (SW) away from the feedback
(FB) pin.
• The CS pin should be connected directly to the SW
pin to accurate sense the voltage across the low-
side MOSFET.
• To minimize noise, place a ground plane underneath
the inductor.
Output Capacitor
• Use a wide trace to connect the output capacitor
ground terminal to the input capacitor ground
terminal.
• Phase margin will change as the output capacitor
value and ESR changes. Contact the factory if the
output capacitor is different from what is shown in
the BOM.
• The feedback trace should be separate from the
power trace and connected as close as possible to
the output capacitor. Sensing a long high current
load trace can degrade the DC load regulation.
RC Snubber
• Place the RC snubber on the same side of the board
and as close to the SW pin as possible.
July 2011
20
M9999-070111-C