SY58017U_0708 Datasheet, PDF (2/11 Pages) Micrel Semiconductor – ULTRA-PRECISION DIFFERENTIAL CML 2:1 MUX with INTERNAL I/O TERMINATION

Micrel, Inc.
Precision Edge^®
SY58017U
PACKAGE/ORDERING INFORMATION
Ordering Information⁽¹⁾
16 15 14 13
IN0 1
/IN0 2
IN1 3
/IN1 4
12 Q
11 GND
10 GND
9 /Q
5678
16-Pin MLF^® (MLF-16)
Part Number
SY58017UMI
SY58017UMITR⁽²⁾
SY58017UMG⁽³⁾
Package
Type
MLF-16
MLF-16
MLF-16
SY58017UMGTR^{(2, 3)} MLF-16
Operating
Range
Industrial
Industrial
Industrial
Industrial
Package
Marking
017U
017U
017U with
Pb-Free bar-line indicator
017U with
Pb-Free bar-line indicator
Lead
Finish
Sn-Pb
Sn-Pb
Pb-Free
NiPdAu
Pb-Free
NiPdAu
Notes:
1. Contact factory for die availability. Dice are guaranteed at T_A = 25°C, DC electricals only.
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
PIN DESCRIPTION
Pin Number
1, 2
3, 4
16, 5
6
7
8, 13
12, 9
10, 11, 14, 15
Pin Name
IN0, /IN0
IN1, /IN1
VT0, VT1
SEL
NC
VCC
Q, /Q
GND,
Exposed Pad
Pin Function
Differential Input: These input pairs are the differential signal inputs to the device. They
accept differential AC- or DC-coupled signals as small as 100mV. Each pin of a pair
internally terminates to a V_T pin through 50Ω. Note that these inputs will default to an
indeterminate state if left open. Please refer to the “Input Interface Applications” section
for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates to a V_T
pin. The V_T0 and V_T1 pins provide a center-tap to a termination network for maximum
interface flexibility. See “Input Interface Applications” section for more details.
This single-ended TTL/CMOS compatible input selects the inputs to the multiplexer. Note
that this input is internally connected to a 25kΩ pull-up resistor and will default to a logic
HIGH state if left open.
No connect.
Positive Power Supply: Bypass with 0.1µF0.01µF low ESR capacitors. 0.01µF capacitor
should be as close to V_CC pin as possible.
Differential Outputs: This CML output pair is the output of the device. Normally terminate
with 100Ω across Q and /Q. See “Output Interface Applications” section. It is a logic
function of the IN0, IN1, and SEL inputs. Please refer to the “Truth Table” for details.
Ground. Ground pins and exposed pad must be connected to the same ground plane.
TRUTH TABLE
TRUTH TABLE
SEL
0
1
Output
IN0 Input Selected
IN1 Input Selected
M9999-082807
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