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MIC26400 Datasheet, PDF (2/27 Pages) Micrel Semiconductor – 5A Hyper Speed Control Synchronous DC/DC Buck Regulator
Micrel, Inc.
Ordering Information
Part Number Voltage Switching Frequency
MIC26400YJL Adjustable
300kHz
Pin Configuration
Junction Temperature
Range
–40°C to +125°C
MIC26400
Package
28-Pin 5mm X 6mm MLF®
Lead
Finish
Pb-Free
Pin Description
Pin Number Pin Name
13, 14, 15,
16, 17, 18, 19
PVIN
24
EN
25
FB
26
SGND
27
VDD
2, 5, 6, 7, 8, 21
PGND
22
CS
20
BST
4, 9, 10, 11, 12
SW
23
VIN
1, 3, 28
NC
28-Pin 5mm X 6mm MLF® (YJL)
Pin Function
High-Side N-internal MOSFET Drain Connection (Input): The PVIN operating voltage range is from
4.5V to 26V. Input capacitors between the PVIN pins and the power ground (PGND) are required.
Note that the connection must be kept short.
Enable (Input): A logic level control of the output. The EN pin is CMOS-compatible. Logic high or
floating = enable, logic low = shutdown. In the off state, the VDD supply current of the device is
reduced (typically 0.7mA).
Feedback (Input): Input to the transconductance amplifier of the control loop. The FB pin is regulated
to 0.8V. A resistor divider connecting the feedback to the output is used to adjust the desired output
voltage.
Signal ground. SGND must be connected directly to the ground planes. Do not route the SGND pin
to the PGND Pad on the top layer. (see PCB Layout Guidelines for details.)
VDD Bias (Input): Power to the internal reference and control sections of the MIC26400. The VDD
operating voltage range is from 4.5V to 5.5V. A 2.2µF ceramic capacitor from the VDD pin-to-PGND
must be placed next to the IC.
Power Ground. PGND is the ground path for the MIC26400 buck converter power stage. The PGND
pin connects to the sources of low-side N-Channel internal MOSFETs, the negative terminals of
input capacitors, and the negative terminals of output capacitors. The loop for the power ground
should be as small as possible and separate from the Signal ground (SGND) loop.
Current Sense (Input): High current output driver return. The CS pin connects directly to the switch
node. Due to the high speed switching on this pin, the CS pin should be routed away from sensitive
nodes. CS pin also senses the current by monitoring the voltage across the low-side internal
MOSFET during OFF-time.
Boost (Output): Bootstrapped voltage to the high-side N-channel internal MOSFET driver. A Schottky
diode is connected between the VDD pin and the BST pin. A boost capacitor of 0.1μF is connected
between the BST pin and the SW pin.
Switch Node (Output): Internal connection for the high-side MOSFET source and low-side MOSFET
drain.
Power Supply Voltage (Input): Requires bypass capacitor to SGND.
No Connect.
July 2010
2
M9999-070110-A