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MIC2177 Datasheet, PDF (2/16 Pages) Micrel Semiconductor – 2.5A Synchronous Buck Regulator
MIC2177
Ordering Information
Part
Number
MIC2177-3.3BWM
MIC2177-5.0BWM
MIC2177BWM
Output
Voltage
3.3V
5.0V
adj.
Switching Temperature
Frequency
Range
200kHz –40°C to +85°C
200kHz –40°C to +85°C
200kHz –40°C to +85°C
Package
20-lead wide SOP
20-lead wide SOP
20-lead wide SOP
Pin Configuration
Micrel
Pin Description
Pin Number
1, 2, 9
3,8
4,5,6,7
10
11
12
13
14,15,16,17
18
19
20
MIC2177
VIN 1
VIN 2
SW 3
PGND 4
PGND 5
PGND 6
PGND 7
SW 8
VIN 9
OUT 10
20 EN
19 BIAS
18 SYNC
17 SGND
16 SGND
15 SGND
14 SGND
13 COMP
12 FB
11 AUTO
20-Lead Wide SOP
Pin Name
VIN
SW
PGND
OUT
AUTO
FB
COMP
SGND
SYNC
BIAS
EN
Pin Function
Supply Input: Controller and switch supply. Unregulated supply input to
internal regulator, output switches, and control circuitry. Requires bypass
capacitor to PGND. All three pins must be connected to VIN.
Switch (Output): Internal power MOSFET switch output. Both pins must be
externally connected together.
Power Ground: Output stage ground connections. Connect all pins to a
common ground plane.
Output Voltage Sense (Input): Senses output voltage to determine minimum
switch current for PWM operation. Connect directly to VOUT.
Automatic Mode: Connect 2.2nF timing capacitor for automatic PWM-/skip-
mode switching. Regulator operates exclusively in PWM mode when pin is
pulled low.
Feedback (Input): Error amplifier inverting input. For adjustable output
version, connect FB to external resistive divider to set output voltage. For
3.3V and 5V fixed output versions, connect FB directly to output.
Compensation: Internal error amplifier output. Connect to capacitor or series
RC network to compensate the regulator control loop.
Signal Ground: Ground connection of control section. Connect all pins to
common ground plane.
Frequency Synchronization (Input): Optional clock input. Connect to
external clock signal to synchronize oscillator. Leading edge of signal above
1.7V terminates switching cycle. Connect to SGND if not used.
Bias Supply: Internal 3.3V bias supply output. Decouple with 0.01µF
bypass capacitor to SGND. Do not apply any external load.
Enable (Input): Logic high enables operation. Logic low shuts down
regulator. Do not allow pin to float.
2
April 1999