MIC2165_1011 Datasheet, PDF (19/28 Pages) Micrel Semiconductor – Adaptive On-Time DC-DC Controller Featuring HyperLight Load®

Micrel, Inc.
MIC2165
One method of reducing the ringing is to use a resistor and
capacitor to lower the Q of the resonant circuit, as shown
in Figure 7. Capacitor C_S is used to block DC and minimize
the power dissipation in the resistor. This capacitor value
should be between 2 and 10 times the parasitic
capacitance of the MOSFET C_OSS. A capacitor that is too
small will have high impedance and prevent the resistor
from damping the ringing. A capacitor that is too large
causes unnecessary power dissipation in the resistor,
which lowers efficiency.
Step 1: First measure the ringing frequency on the switch
node voltage when the high-side MOSFET turns on. This
ringing is characterized by Equation 28:
f₁ = _2π
1
L_P × C_P
(28)
where C_P and L_P are the parasitic capacitance and
inductance.
L_STRAY1
R_DS
L_STRAY2
L_STRAY3
R_S
C_OSS2
L_STRAY4
C_S
Figure 7. Snubber Circuit
The snubber components should be placed as close as
possible to the low-side MOSFET and/or external schottky
diode since it contributes to most of the stray capacitance.
Placing the snubber too far from the MOSFET or using
trace that is too long or thin will add inductance to the
snubber and diminishes its effectiveness.
A proper snubber design requires that the parasitic
inductance and capacitance be known. A method of
determining these values and calculating the damping
resistor value is outlined below.
1. Measure the ringing frequency at the switch node which
is determined by parasitic L_P and C_P. Define this frequency
as f₁.
2. Add a capacitor C_S (such as 2 times as big as the C_OSS
of the FET) from the switch node to ground and measure
the new ringing frequency. Define this new (lower)
frequency as f₂. L_P and C_P can now be solved using the
values of f₁, f₂ and C_S.
3. Add a resistor R_S in series with C_S to generate critical
damping.
Step 2: Add a capacitor, C_S, in parallel with the
synchronous MOSFET, Q2. The capacitor value should be
approximately 2 times the C_OSS of Q2. Measure the
frequency of the switch node ringing, f₂:
f₂
=
2π
1
Lp × (Cs + Cp)
(29)
Define f’ as:
f ^' = ^f1
f₂
Combining the equations for f₁, f₂ and f’ to derive C_P, the
parasitic capacitance:
C_P
=
C_S
(f^' )² −
1
(30)
L_P is solved by re-arranging the equation for f₁:
L_P
=
(2π)²
1
× C_P
× (f₁)²
(31)
Step 3: Calculate the damping resistor.
Critical damping occurs at Q = 1:
Q = R_S ×
C_{P = 1}
L_P
(32)
September 2010
19
M9999-092410-E