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MIC26601 Datasheet, PDF (17/30 Pages) Micrel Semiconductor – 28V, 6A Hyper Speed Control™ Synchronous DC/DC Buck Regulator
Micrel, Inc.
Current Limit Threshold
vs. Feedback Voltage
20
16
12
8
4
0
0.0
0.2
0.4
0.6
0.8
1.0
FEEDBACK VOLTAGE (V)
Figure 4. MIC26601 Current-Limit
Foldback Characteristic
Power Good (PG)
The Power Good (PG) pin is an open drain output which
indicates logic high when the output is nominally 92% of
its steady state voltage. A pull-up resistor of more than
10kΩ should be connected from PG to VDD.
MOSFET Gate Drive
The block diagram (Figure 1) shows a bootstrap circuit,
consisting of D1 (a Schottky diode is recommended) and
CBST. This circuit supplies energy to the high-side drive
circuit. Capacitor CBST is charged, while the low-side
MOSFET is on, and the voltage on the SW pin is
approximately 0V. When the high-side MOSFET driver is
turned on, energy from CBST is used to turn the MOSFET
on. As the high-side MOSFET turns on, the voltage on
the SW pin increases to approximately VIN. Diode D1 is
reverse biased and CBST floats high while continuing to
keep the high-side MOSFET on. The bias current of the
high-side driver is less than 10mA so a 0.1μF to 1μF is
sufficient to hold the gate voltage with minimal droop for
the power stroke (high-side switching) cycle, i.e. ΔBST =
10mA x 1.67μs/0.1μF = 167mV. When the low-side
MOSFET is turned back on, CBST is recharged through
D1. A small resistor RG, which is in series with CBST, can
be used to slow down the turn-on time of the high-side
N-channel MOSFET.
The drive voltage is derived from the VDD supply voltage.
The nominal low-side gate drive voltage is VDD and the
nominal high-side gate drive voltage is approximately
VDD – VDIODE, where VDIODE is the voltage drop across
D1. An approximate 30ns delay between the high-side
and low-side driver transitions is used to prevent current
from simultaneously flowing unimpeded through both
MOSFETs.
July 2011
17
MIC26601
M9999-071311-A