MIC22705 Datasheet, PDF (16/28 Pages) Micrel Semiconductor – 1MHz, 7A Integrated Switch High-Efficiency Synchronous Buck Regulator

Micrel, Inc.
The integration of one pole-zero pair within the control
loop greatly simplifies compensation. The optimum
values for C_COMP (in series with a 20k resistor) are shown
below.
CÆ
LÈ
22µF ̶ 47µF 47µF ̶ 100µF 100µF ̶ 470µF
0.47µH
1µH
0* ̶ 10pF
0^† ̶ 15pF
22pF
15 ̶ 22pF
33pF
33pF
2.2µH
15 ̶ 33pF
33 ̶ 47pF
* VOUT > 1.2V, ^† VOUT > 1V
100 ̶ 220pF
Feedback
The MIC22705 provides a feedback pin to adjust the
output voltage to the desired level. This pin connects
internally to an error amplifier. The error amplifier then
compares the voltage at the feedback to the internal
0.7V reference voltage and adjusts the output voltage to
maintain regulation. The resistor divider network for a
desired V_OUT is given by:
R2 = ^R1
⎜⎛ ^VOUT
⎜⎝ _VREF
− 1_{⎟⎟⎠⎞}
where V_REF is 0.7V and V_OUT is the desired output
voltage. A 10kΩ or lower resistor value from the output
to the feedback (R1) is recommended since large
feedback resistor values increase the impedance at the
feedback pin, making the feedback node more
susceptible to noise pick-up. A small capacitor (50pF –
100pF) across the lower resistor can reduce noise pick-
up by providing a low impedance path to ground.
Enable/Delay (EN/DLY) Pin
Enable/Delay (EN/DLY) sources 1µA out of the IC to
allow a startup delay to be implemented. The delay time
is simply the time it takes 1µA to charge C_EN/DLY to
1.25V. Therefore:
t _EN/DLY
= ^{1.24 × CEN/DLY}
1×10 ^{− 6}
MIC22705
Delay Pin (DELAY)
The delay (DELAY) pin also has a 1µA trimmed current
source and a 1µA current sink which acts with an
external capacitor to delay the operation of the Power
Good (PG) output. This can be used also in sequencing
outputs in a sequenced system, but with the addition of a
conditional delay between supplies; allowing a first up,
last down power sequence.
After enable (EN/DLY) is driven high, V_OUT will start to
rise (rate determined by RC capacitor). As the FB
voltage goes above 90% of its nominal set voltage,
DELAY begins to rise as the 1µA source charges the
external capacitor. When the threshold of 1.24V is
crossed, PG is asserted high and DLY continues to
charge to a voltage V_DD. When FB falls below 90% of
nominal, POR is asserted low immediately. However, if
EN/DLY is driven low, PG will fall immediately to the low
state and DELAY will begin to fall as the external
capacitor is discharged by the 1µA current sink. When
the threshold of V_DD − 1.24V is crossed, V_OUT will begin to
fall at a rate determined by the RC capacitor. As the
voltage change in both cases is 1.24V, both rising and
falling delays are matched at
t _PG
= ^{1.24 × CDELAY}
1×10 ^{− 6}
.
RC Pin (Soft-Start)
The RC pin provides a trimmed 1µA current source/sink
for accurate ramp up (soft-start). This allows the
MIC22705 to be used in systems requiring voltage
tracking or ratio-metric voltage tracking at startup.
There are two ways of using the RC pin:
1. Externally driven from a voltage source
2. Externally attached capacitor sets output ramp
up/down rate
In the first case, driving RC with a voltage from 0V to
V_REF will program the output voltage between 0 and
100% of the nominal set voltage.
In the second case, the external capacitor sets the ramp
up and ramp down time of the output voltage. The time
is
given by
t _RAMP
=
0.7 × C_RC
1×10 ^{− 6}
where t_RAMP is the time
from 0 to 100% nominal output voltage.
December 2010
16
M9999-121710-A