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MIC2176 Datasheet, PDF (15/31 Pages) Micrel Semiconductor – Wide Input Voltage, Synchronous Buck
Micrel, Inc.
Figure 3 shows the operation of the MIC2176 during a
load transient. The output voltage drops due to the
sudden load increase, which causes the VFB to be less
than VREF. This will cause the error comparator to trigger
an ON-time period. At the end of the ON-time period, a
minimum OFF-time tOFF(min) is generated to charge CBST
since the feedback voltage is still below VREF. Then, the
next ON-time period is triggered due to the low feedback
voltage. Therefore, the switching frequency changes
during the load transient, but returns to the nominal fixed
frequency once the output has stabilized at the new load
current level. With the varying duty cycle and switching
frequency, the output recovery time is fast and the
output voltage deviation is small in MIC2176 converter.
Figure 3. MIC2176 Load Transient Response
Unlike true current-mode control, the MIC2176 uses the
output voltage ripple to trigger an ON-time period. The
output voltage ripple is proportional to the inductor
current ripple if the ESR of the output capacitor is large
enough. The MIC2176 control loop has the advantage of
eliminating the need for slope compensation.
In order to meet the stability requirements, the MIC2176
feedback voltage ripple should be in phase with the
inductor current ripple and large enough to be sensed by
the gm amplifier and the error comparator. The
recommended feedback voltage ripple is 20mV~100mV.
If a low ESR output capacitor is selected, then the
feedback voltage ripple may be too small to be sensed
by the gm amplifier and the error comparator. Also, the
output voltage ripple and the feedback voltage ripple are
not necessarily in phase with the inductor current ripple if
the ESR of the output capacitor is very low. In these
cases, ripple injection is required to ensure proper
operation. Please refer to “Ripple Injection” subsection in
Application Information for more details about the ripple
injection technique.
MIC2176
Soft-Start
Soft-start reduces the power supply input surge current
at startup by controlling the output voltage rise time. The
input surge appears while the output capacitor is
charged up. A slower output rise time will draw a lower
input surge current.
The MIC2176 implements an internal digital soft-start by
making the 0.8V reference voltage VREF ramp from 0 to
100% in about 6ms with 9.7mV steps. Therefore, the
output voltage is controlled to increase slowly by a stair-
case VFB ramp. Once the soft-start cycle ends, the
related circuitry is disabled to reduce current
consumption. VDD must be powered up at the same time
or after VIN to make the soft-start function correctly.
Current Limit
The MIC2176 uses the RDS(ON) of the low-side power
MOSFET to sense over-current conditions. This method
will avoid adding cost, board space and power losses
taken by discrete current sense resistors. The low-side
MOSFET is used because it displays much lower
parasitic oscillations during switching than the high-side
MOSFET.
In each switching cycle of the MIC2176 converter, the
inductor current is sensed by monitoring the low-side
MOSFET in the OFF period. The sensed voltage is
compared with a current-limit threshold voltage VCL after
a blanking time of 150ns. If the sensed voltage is over
VCL, which is 133mV typical at 0.8V VFB, then the
MIC2176 turns off the high-side and low-side MOSFETs
and a soft-start sequence is triggered. This mode of
operation is called “hiccup mode” and its purpose is to
protect the downstream load in case of a hard short. The
current limit threshold VCL has a foldback characteristic
related to the FB voltage. Please refer to the “Typical
Characteristics” for the curve of current limit threshold vs.
FB voltage percentage. The circuit in Figure 4 illustrates
the MIC2176 current limiting circuit.
Figure 4. MIC2176 Current Limiting Circuit
November 2010
15
M9999-111710-A